Re: [PATCH v9 1/1] rust: pci: add extended capability and SR-IOV support

[Zhi Wang <zhiw@nvidia.com>]

On Sun, 06 Sep 2026 10:24:39 +0900
"Alexandre Courbot" <acourbot@nvidia.com> wrote:

Gentle ping for the next step. :)

> On Thu Aug 27, 2026 at 9:18 PM JST, Zhi Wang wrote:
> > Rust PCI drivers have no typed interface for locating and accessing
> > PCIe extended capabilities.
> >
> > The SR-IOV extended capability describes VF topology and VF BARs.
> > Expose this information through the Rust PCI abstraction so drivers
> > can use the existing typed configuration-space accessors instead of
> > raw bindings.
> >
> > Define ExtCapability to associate a capability ID with a register
> > layout, and add ConfigSpace::find_ext_capability() to locate and
> > project that layout. Bound the view at the next capability or the
> > end of extended configuration space. Add ExtSriovRegs and a decoded
> > VF BAR iterator that reads and validates all six VF BAR register
> > slots up front, yields decoded BAR addresses and widths in logical
> > order, and keeps the raw configuration-space slot advancement
> > internal. Since PCI_EXT_CAP_NEXT() is a function-like macro, expose
> > it through a Rust helper.
> >
> > Keep raw SR-IOV registers private because PCI core owns their
> > state. Expose the current First VF Offset through a read-only
> > accessor because the Nova GSP ABI needs the raw 16-bit First VF
> > Offset in Routing ID space. The pci_iov_virtfn_devfn() helper
> > instead returns the low eight bits of a calculated VF Routing ID.
> >
> > Link:
> > https://lore.kernel.org/rust-for-linux/20260818084633.1673214-2-zhiw@nvidia.com/
> > Cc: Alexandre Courbot <acourbot@nvidia.com> Cc: Gary Guo
> > <gary@garyguo.net> Signed-off-by: Zhi Wang <zhiw@nvidia.com>
> 
> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>