From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A0C4C52E047 for ; Thu, 1 Oct 2026 15:35:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790868918; cv=none; b=kOpucL4fZwR36sNNMDMnBHFC1emTY8JZRUtG7iqeNrhjLeafGTvvlTX6E8NJwH+8ESge3vQmXso5ldalWIQZrWm0gpPPc7qSHStB3sIa5/+31XLISjhkMk/IzZi2PPoSezec11K275HQ7oYfTWp9irSEoHS1LmtG6OTVfJTHpl8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790868918; c=relaxed/simple; bh=zQYhhJIX+AtSFt9b1zxzajejfG+46fOWlJsOrvAKW1Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T66TG51ITF6HXtabH+CgttmSZcUzMagYZzdmG5Y+q80eBlyfkIfXrjnZnLgXi+WVeqjzYNsSHLhjekwj/E4XFyfMJ2xirBVZk6Fa2Io/Hc2YB2p4qfQuVzBCFPJOC6k1zFIchrcxV79Fm3C44a90h7s1KHCBLZB6q0qyowc5ttg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=q9hSD5qN; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="q9hSD5qN" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 869F3497; Thu, 1 Oct 2026 08:35:12 -0700 (PDT) Received: from e142021.fritz.box (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 502313F86F; Thu, 1 Oct 2026 08:35:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1790868915; bh=zQYhhJIX+AtSFt9b1zxzajejfG+46fOWlJsOrvAKW1Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=q9hSD5qNmhpNA9VAqDFkTj/eCEtniYckGkjfhbrDHGMOypBYYMakBRuyoFBc0uq7K HVwWlWlrIEzCZH6V6AOTGAoVranlWSM3ZC7YA1qefH2E4Gjnm0CehDH6zC5vCR/lR+ tKUltn6DqHN6Ejlsj56E3iDAOiNNs7j31F4lkhGM= From: Andre Przywara To: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J . Wysocki" , Len Brown , James Morse , Ben Horgan , Reinette Chatre , Fenghua Yu Cc: Jonathan Cameron , Srivathsa L Rao , Ganapatrao Kulkarni , Trilok Soni , Srinivas Ramana , Niyas Sait , Lee Trager , Ritwick Sharma , Gavin Shan , linux-acpi@vger.kernel.org--cc, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v12 06/13] arm_mpam: propagate MSC access errors for state saving function Date: Thu, 1 Oct 2026 17:34:31 +0200 Message-ID: <20261001153439.3295416-7-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261001153439.3295416-1-andre.przywara@arm.com> References: <20261001153439.3295416-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Allow the mpam_save_mbwu_state() function to return an error, and propagate read and write errors from the lower level up. Signed-off-by: Andre Przywara Reviewed-by: Jonathan Cameron Reviewed-by: Ben Horgan Reviewed-by: Gavin Shan Tested-by: Gavin Shan # on NVIDIA Grace Hopper --- drivers/resctrl/mpam_devices.c | 29 ++++++++++++++++++++++------- 1 file changed, 22 insertions(+), 7 deletions(-) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index 216e761c0d52c..e7692a11799e9 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -1855,22 +1855,37 @@ static int mpam_save_mbwu_state(void *arg) mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, i) | FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx); - mpam_write_monsel_reg(msc, CFG_MON_SEL, mon_sel); - mpam_read_monsel_reg(msc, CFG_MBWU_FLT, &cur_flt); - mpam_read_monsel_reg(msc, CFG_MBWU_CTL, &cur_ctl); - mpam_write_monsel_reg(msc, CFG_MBWU_CTL, 0); + ret = mpam_write_monsel_reg(msc, CFG_MON_SEL, mon_sel); + if (ret) + return ret; + ret = mpam_read_monsel_reg(msc, CFG_MBWU_FLT, &cur_flt); + if (ret) + return ret; + ret = mpam_read_monsel_reg(msc, CFG_MBWU_CTL, &cur_ctl); + if (ret) + return ret; + ret = mpam_write_monsel_reg(msc, CFG_MBWU_CTL, 0); + if (ret) + return ret; if (mpam_ris_has_mbwu_long_counter(ris)) { ret = mpam_msc_read_mbwu_l(msc, &val); if (ret) return ret; - mpam_msc_zero_mbwu_l(msc); + ret = mpam_msc_zero_mbwu_l(msc); + if (ret) + return ret; } else { u32 val32; - mpam_read_monsel_reg(msc, MBWU, &val32); + ret = mpam_read_monsel_reg(msc, MBWU, &val32); + if (ret) + return ret; val = val32; - mpam_write_monsel_reg(msc, MBWU, 0); + + ret = mpam_write_monsel_reg(msc, MBWU, 0); + if (ret) + return ret; } cfg->mon = i; -- 2.43.0