From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 759B943DEA6; Fri, 2 Oct 2026 07:44:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790927072; cv=none; b=QZcO1ekysleViSB4JH10NiUN58BZSGYczLUn/f5tya4mG4ud7Gk5NviRcI0umNg42a3TzeeB5oBLAuXFFjBOfd9pgGndmOWe1s48tiQHNiEopL8GSnqV4CSs9TsE2ZIzBrD7hlIDbZQpqDFpOlIkpcdsFN3TJR/M7zWNWrsnH08= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790927072; c=relaxed/simple; bh=aL2PIsy9XXaXmH/PL0XoU8+bc7B0/QFL8gjIPqQmpzE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=pejfyPbRvDRi7fsdBmy0Gpq1a4AqdM94kSFl0/oUFzuYaCB2mD7mTd3Iudc2paXYeyzNz4IU8BOUqavSf7r/h/Nfv7rHMy4tiJ0vagHy8PZSWpY+ouxGq/TKaDA+N/H1u+nrk8ps7MeXH2mLW+8Aa/FJBLyBVMM+9yyYULfDxHk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b=iQSF1Q1s; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=realtek.com header.i=@realtek.com header.b="iQSF1Q1s" X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 6927hopcF3646828, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realtek.com; s=dkim; t=1790927030; bh=oH0+AyrPqVL+/j9iteNRUL5qj/8tZfnE2fNJIb0CWMM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=iQSF1Q1s1OOFvBwH/CPYc9PoLGfLKtEqY1uim3auXaA4KRcnIeQ0vrVvDdAs56/HM Zlt0THeMiHTrJXupQB9JngZs9Q1ORtg43h9l//lKIuK90xNrQb/RnLhh9LyyxyP6bi 5pdFrG1sIGzPHWcU+xckrWPG6GUarRRKA4GdDXkymtJRFVS/AJrFkNyxFXdCN9OPIB CBbs8mVilFge2qshcmlqPA4zmfUYhnNDpnAz3b4MvAN7oCXm67GM7EJg0a3klfbaff rB8f+KjgTEj+/zR1993V3n9flU48d5wWZct0Wz2iGbbq9ZBMjkPJmdoT0s2g14RHfI pUa9nzDuJMwMw== Received: from mail.realtek.com (rtkexhmbs03.realtek.com.tw[10.21.1.53]) by rtits2.realtek.com.tw (8.15.2/3.29/5.94) with ESMTPS id 6927hopcF3646828 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 2 Oct 2026 15:43:50 +0800 Received: from RTKEXHMBS06.realtek.com.tw (10.21.1.56) by RTKEXHMBS03.realtek.com.tw (10.21.1.53) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49; Fri, 2 Oct 2026 15:43:35 +0800 Received: from cn1dhc-k02 (172.21.252.101) by RTKEXHMBS06.realtek.com.tw (10.21.1.56) with Microsoft SMTP Server id 15.2.2562.49 via Frontend Transport; Fri, 2 Oct 2026 15:43:35 +0800 From: Yu-Chun Lin To: , , , , , , , , , CC: , , , , , , , , Subject: [PATCH v15 11/11] arm64: dts: realtek: Add clock support for RTD1625 Date: Fri, 2 Oct 2026 15:43:31 +0800 Message-ID: <20261002074331.3066919-12-eleanor.lin@realtek.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20261002074331.3066919-1-eleanor.lin@realtek.com> References: <20261002074331.3066919-1-eleanor.lin@realtek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Add the clock controller nodes and osc27m fixed clock for the Realtek RTD1625 SoC. Signed-off-by: Yu-Chun Lin --- Changes in v15: - None. --- arch/arm64/boot/dts/realtek/kent.dtsi | 33 +++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/realtek/kent.dtsi b/arch/arm64/boot/dts/realtek/kent.dtsi index df0d5ee3b1b9..e4dc8903efa9 100644 --- a/arch/arm64/boot/dts/realtek/kent.dtsi +++ b/arch/arm64/boot/dts/realtek/kent.dtsi @@ -26,6 +26,15 @@ timer { ; }; + clocks { + osc27m: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "osc27m"; + #clock-cells = <0>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -141,6 +150,22 @@ rbus: bus@98000000 { #address-cells = <1>; #size-cells = <1>; + cc: clock-controller@0 { + compatible = "realtek,rtd1625-crt-clk"; + reg = <0x0 0x900>; + clocks = <&osc27m>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + ic: clock-controller@7088 { + compatible = "realtek,rtd1625-iso-clk"; + reg = <0x7088 0x8>; + clocks = <&osc27m>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + uart0: serial@7800 { compatible = "snps,dw-apb-uart"; reg = <0x7800 0x100>; @@ -205,6 +230,14 @@ isom_pinctrl: pinctrl@146200 { reg = <0x146200 0x34>; }; + iso_s_cc: clock-controller@146310 { + compatible = "realtek,rtd1625-iso-s-clk"; + reg = <0x146310 0x8>; + clocks = <&osc27m>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + ve4_pinctrl: pinctrl@14e000 { compatible = "realtek,rtd1625-ve4-pinctrl"; reg = <0x14e000 0x84>; -- 2.43.0