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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-34f15019999sm5772904eec.29.2026.10.02.05.04.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2026 05:04:35 -0700 (PDT) From: Prajwal N To: anup@brainfault.org, tglx@kernel.org, radu@rendec.net, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, prajwal.n.oss@gmail.com, Prajwal N Subject: [PATCH] irqchip: riscv-imsic: Expose the fwnode via the global config Date: Fri, 2 Oct 2026 17:34:17 +0530 Message-ID: <20261002120417.2708979-1-prajwal.n@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMDAyMDA0OCBTYWx0ZWRfX7EgfieErbno4 zr9I2pbfYyYsLjXZmPNw8CNCo6DkGqJ2TGMmsUrl5rPDmdS0C4svEBXaltye+v2hJ7tWo6S7/cF 15ottcRQ6FjyCncs9Ldr4hBV6wxj7Ss= X-Proofpoint-GUID: GoqVVFpEZ-AgDBNl-58oyi-lVPuyN7Md X-Authority-Analysis: v=2.4 cv=UJZIjyfy c=1 sm=1 tr=0 ts=6abf9dd7 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=EUspDBNiAAAA:8 a=pqfPdFw0YKYeVI_BzH8A:9 a=bBxd6f-gb0O0v-kibOvt:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDAyMDA0OCBTYWx0ZWRfX4vyCIBK8ys8E R8mY+stajWGA18va/BiHst8yR1FIhf+pWuzwYOaMEmU9b4q630yRtYjALl1cbLm2ZAA2AWsweL1 n0AyOjxuzSA6+TUMt+0Ry/AM5UXqPWrMOdTKJiAW0D5nrJu5glvanehrMhl5YkbriQ2d92RAXLk 2ilpu4+5Gw+IFN+4ILEA6BiDjjn4hTqyIWh8iNgklGiDnCzsQy4nWHdmGKiTopSklsv3NAUvMa6 i34GrJFRthHn7drO1T1BZMqukEFr2t1zWYfGTicqgZD/gyvtUJc6HXabqN+m1i2/WuJr5NMqwjJ ilXGjdSJbuENczt6V4oQKyyxWPhEyS6yYe5eKzwER1XQWJpD0fMoFTvFB2mlvR4XH8YEjRUPPo6 +jZop9Ps7tiKOMzrBUMZESa4o0qQEpI3bm0r3589K7eq7iKskdzQ4BjqpoYx2marV57ALMsfFkc VgyBltM1sfffxOt7ufQ== X-Proofpoint-ORIG-GUID: GoqVVFpEZ-AgDBNl-58oyi-lVPuyN7Md X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-02_03,2026-10-01_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 suspectscore=0 clxscore=1011 priorityscore=1501 spamscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610020048 The fwnode describes a global property of the IMSIC interrupt controller that is equally relevant to external consumers of imsic_global_config as it is to the imsic_priv itself. Keeping it in imsic_priv forces the external drivers to access the private structure rather than using the already exported imsic_get_global_config() interface. Moving the fwnode into imsic_global_config makes the public API self-contained and eliminates the need for callers to access imsic_priv internals directly. Signed-off-by: Prajwal N --- drivers/irqchip/irq-riscv-imsic-early.c | 2 +- drivers/irqchip/irq-riscv-imsic-platform.c | 18 +++++++++--------- drivers/irqchip/irq-riscv-imsic-state.c | 2 +- drivers/irqchip/irq-riscv-imsic-state.h | 3 --- include/linux/irqchip/riscv-imsic.h | 3 +++ 5 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/irqchip/irq-riscv-imsic-early.c b/drivers/irqchip/irq-riscv-imsic-early.c index 12efd241ce88..769849147148 100644 --- a/drivers/irqchip/irq-riscv-imsic-early.c +++ b/drivers/irqchip/irq-riscv-imsic-early.c @@ -75,7 +75,7 @@ static int __init imsic_ipi_domain_init(void) riscv_ipi_set_virq_range(virq, IMSIC_NR_IPI); /* Announce that IMSIC is providing IPIs */ - pr_info("%pfwP: providing IPIs using interrupt %d\n", imsic->fwnode, IMSIC_IPI_ID); + pr_info("%pfwP: providing IPIs using interrupt %d\n", imsic->global.fwnode, IMSIC_IPI_ID); return 0; } diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c index 643c8e459611..95ff76e63a69 100644 --- a/drivers/irqchip/irq-riscv-imsic-platform.c +++ b/drivers/irqchip/irq-riscv-imsic-platform.c @@ -313,40 +313,40 @@ int imsic_irqdomain_init(void) }; struct imsic_global_config *global; - if (!imsic || !imsic->fwnode) { + if (!imsic || !imsic->global.fwnode) { pr_err("early driver not probed\n"); return -ENODEV; } if (imsic->base_domain) { - pr_err("%pfwP: irq domain already created\n", imsic->fwnode); + pr_err("%pfwP: irq domain already created\n", imsic->global.fwnode); return -ENODEV; } /* Create Base IRQ domain */ - info.fwnode = imsic->fwnode, + info.fwnode = imsic->global.fwnode, imsic->base_domain = msi_create_parent_irq_domain(&info, &imsic_msi_parent_ops); if (!imsic->base_domain) { - pr_err("%pfwP: failed to create IMSIC base domain\n", imsic->fwnode); + pr_err("%pfwP: failed to create IMSIC base domain\n", imsic->global.fwnode); return -ENOMEM; } global = &imsic->global; pr_info("%pfwP: hart-index-bits: %d, guest-index-bits: %d\n", - imsic->fwnode, global->hart_index_bits, global->guest_index_bits); + imsic->global.fwnode, global->hart_index_bits, global->guest_index_bits); pr_info("%pfwP: group-index-bits: %d, group-index-shift: %d\n", - imsic->fwnode, global->group_index_bits, global->group_index_shift); + imsic->global.fwnode, global->group_index_bits, global->group_index_shift); pr_info("%pfwP: per-CPU IDs %d at base address %pa\n", - imsic->fwnode, global->nr_ids, &global->base_addr); + imsic->global.fwnode, global->nr_ids, &global->base_addr); pr_info("%pfwP: total %d interrupts available\n", - imsic->fwnode, num_possible_cpus() * (global->nr_ids - 1)); + imsic->global.fwnode, num_possible_cpus() * (global->nr_ids - 1)); return 0; } static int imsic_platform_probe_common(struct fwnode_handle *fwnode) { - if (imsic && imsic->fwnode != fwnode) { + if (imsic && imsic->global.fwnode != fwnode) { pr_err("%pfwP: fwnode mismatch\n", fwnode); return -ENODEV; } diff --git a/drivers/irqchip/irq-riscv-imsic-state.c b/drivers/irqchip/irq-riscv-imsic-state.c index b8d1bbbf42f7..ae982f89318b 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.c +++ b/drivers/irqchip/irq-riscv-imsic-state.c @@ -813,9 +813,9 @@ int __init imsic_setup_state(struct fwnode_handle *fwnode, void *opaque) imsic = kzalloc_obj(*imsic); if (!imsic) return -ENOMEM; - imsic->fwnode = fwnode; global = &imsic->global; + global->fwnode = fwnode; global->local = alloc_percpu(typeof(*global->local)); if (!global->local) { rc = -ENOMEM; diff --git a/drivers/irqchip/irq-riscv-imsic-state.h b/drivers/irqchip/irq-riscv-imsic-state.h index c42ee180b305..178b678f5c0f 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.h +++ b/drivers/irqchip/irq-riscv-imsic-state.h @@ -44,9 +44,6 @@ struct imsic_local_priv { }; struct imsic_priv { - /* Device details */ - struct fwnode_handle *fwnode; - /* Global configuration common for all HARTs */ struct imsic_global_config global; diff --git a/include/linux/irqchip/riscv-imsic.h b/include/linux/irqchip/riscv-imsic.h index 61af3a5bea09..b7be1aad7774 100644 --- a/include/linux/irqchip/riscv-imsic.h +++ b/include/linux/irqchip/riscv-imsic.h @@ -46,6 +46,9 @@ struct imsic_local_config { }; struct imsic_global_config { + /* Device details */ + struct fwnode_handle *fwnode; + /* * MSI Target Address Scheme * -- 2.43.0