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Date: Fri, 2 Oct 2026 09:55:49 +0200
From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: Leonardo Martins Martins <dev.lmmrtns@gmail.com>
Cc: linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/3] staging: rtl8723bs: refactor
 PHY_ConvertTxPowerLimitToPowerIndex()
Message-ID: <2026100229-cilantro-facing-f434@gregkh>
References: <20261002-rtl8723bs-tx-pwr-limit-v2-0-48b180fb6f7f@gmail.com>
 <2026100211-scenic-eligibly-58f5@gregkh>
 <ar9fwqJ04CzzSy4L@debian>
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In-Reply-To: <ar9fwqJ04CzzSy4L@debian>

On Fri, Oct 02, 2026 at 04:39:46AM -0300, Leonardo Martins Martins wrote:
> > When doing logic refactoring, testing on the real hardware is best.
> 
> Makes sense, so should I be dropping patch 2 where the logic is
> refactored, but still do patch 3 where the inner loop is extracted into
> __phy_tx_power_limit_to_index() to reduce all the indentations?

Yes, that's probably best as it's easiest to "prove" it's correct by
just looking at it.

thanks,

greg k-h