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The THS driver then keeps the calibration registers at their reset value (0x800), and the reported temperatures have a chip-dependent offset. This series adds the R40 SID (eFuse) controller and connects the THS node to its factory calibration at eFuse offset 0x40. Patch 1 adds the R40 compatible to the SID binding, with the A64 compatible as fallback. The SID driver needs no change. Patch 2 adds the SID node to sun8i-r40.dtsi and the nvmem cell for the THS calibration. Checked with dt_binding_check, and with dtbs_check on all R40, V40 and T3 board DTBs. No warnings. Tested on two Boardcon EMA40i (A40i) boards. Otavio Salvador (2): dt-bindings: nvmem: SID: Add binding for R40 SID controller ARM: dts: sun8i-r40: Add SID node and THS calibration .../bindings/nvmem/allwinner,sun4i-a10-sid.yaml | 1 + arch/arm/boot/dts/allwinner/sun8i-r40.dtsi | 15 ++++++++++++++- 2 files changed, 15 insertions(+), 1 deletion(-) base-commit: ff47652a4b66c067c765a7ad464d930b5a9367cc -- 2.55.0