From: Changhuang Liang <changhuang.liang@starfivetech.com>
To: Mark Brown <broonie@kernel.org>
Cc: Serge Semin <fancer.lancer@gmail.com>,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
Changhuang Liang <changhuang.liang@starfivetech.com>
Subject: [PATCH] spi: dw: Unconditionally stop DMA on errors
Date: Sat, 3 Oct 2026 09:18:07 -0700 [thread overview]
Message-ID: <20261003161807.59429-1-changhuang.liang@starfivetech.com> (raw)
dw_spi_dma_stop() and dw_spi_enh_mem_dma_stop() only terminate a DMA
channel when the corresponding busy flag is set. They are only called
on error paths, where the flags are not guaranteed to match the state
of the DMA engine, so a channel may be left running.
Terminate the channels and clear the busy flags unconditionally in
dw_spi_dma_stop(). A channel may be missing when only one DMA channel
is available, so check for that.
With that the enhanced memory operation variant is no longer needed,
use dw_spi_dma_stop() there as well.
Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
---
drivers/spi/spi-dw-dma.c | 33 +++++++++++----------------------
1 file changed, 11 insertions(+), 22 deletions(-)
diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c
index a86039057988..b706770334a6 100644
--- a/drivers/spi/spi-dw-dma.c
+++ b/drivers/spi/spi-dw-dma.c
@@ -718,14 +718,18 @@ static int dw_spi_dma_transfer(struct dw_spi *dws, struct spi_transfer *xfer)
static void dw_spi_dma_stop(struct dw_spi *dws)
{
- if (test_bit(DW_SPI_TX_BUSY, &dws->dma_chan_busy)) {
+ /*
+ * This is only called on errors, so don't rely on the busy flags
+ * being in sync with the DMA engine state. A channel may be missing
+ * when only one DMA channel is available.
+ */
+ if (dws->txchan)
dmaengine_terminate_sync(dws->txchan);
- clear_bit(DW_SPI_TX_BUSY, &dws->dma_chan_busy);
- }
- if (test_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy)) {
+ if (dws->rxchan)
dmaengine_terminate_sync(dws->rxchan);
- clear_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy);
- }
+
+ clear_bit(DW_SPI_TX_BUSY, &dws->dma_chan_busy);
+ clear_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy);
}
/*
@@ -844,21 +848,6 @@ static bool dw_spi_enh_mem_can_dma(struct spi_controller *ctlr)
return dws->dma_addr_widths & BIT(dma_bus_width);
}
-static void dw_spi_enh_mem_dma_stop(struct dw_spi *dws)
-{
- if (dws->tx_dir) {
- if (test_bit(DW_SPI_TX_BUSY, &dws->dma_chan_busy)) {
- dmaengine_terminate_sync(dws->txchan);
- clear_bit(DW_SPI_TX_BUSY, &dws->dma_chan_busy);
- }
- } else {
- if (test_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy)) {
- dmaengine_terminate_sync(dws->rxchan);
- clear_bit(DW_SPI_RX_BUSY, &dws->dma_chan_busy);
- }
- }
-}
-
static int dw_spi_enh_mem_dma_transfer(struct spi_mem *mem, const struct spi_mem_op *op)
{
struct spi_controller *ctlr = mem->spi->controller;
@@ -893,7 +882,7 @@ static int dw_spi_enh_mem_dma_transfer(struct spi_mem *mem, const struct spi_mem
}
if (ret)
- dw_spi_enh_mem_dma_stop(dws);
+ dw_spi_dma_stop(dws);
else
ret = dw_spi_check_status(dws, true);
--
2.25.1
reply other threads:[~2026-10-03 16:33 UTC|newest]
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