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Sat, 3 Oct 2026 10:12:19 -0700 Received: from inno-x280 (10.127.8.13) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49 via Frontend Transport; Sat, 3 Oct 2026 10:12:13 -0700 Date: Sat, 3 Oct 2026 19:12:10 +0200 From: Zhi Wang To: Danilo Krummrich CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , Peter Colberg Subject: Re: [PATCH v3 05/10] rust: pci: add num_vf(), to return number of VFs Message-ID: <20261003191210.7150c343@inno-x280> In-Reply-To: References: X-Mailer: Claws Mail 4.3.1 (GTK 3.24.52; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002312:EE_|CH1PPF2D39B31FF:EE_ X-MS-Office365-Filtering-Correlation-Id: a10c4bef-4250-4d18-0057-08df21717f3f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|82310400026|376014|23010399003|36860700016|1800799024|18002099003|22082099003|4143699003|6133799003|10067099003|56012099006|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: aJslkcd9xo2vXSUz0uJZLzXslP8Gur1/i5SmEDWmq2T8jFtNkJxiWTp6E1Ip0nb5C21ii7P0DwTePhaba/RCAqWsLJwbjUIRKvt3CJxxOZlskk/RZ/iXUTQ8e7Cxoy3xycORhOIeBbNd4Ukm/amQsQT3x5tf/p4lnVb2HsfJm2JLa1oofZQIU8GwwzrlHhu7jTXhXBE2v2pIkO2HnMvkDmLsDz8dffuv3+AEAGMT1tIRlM5Xwb7FeoAcVlY7GAIZ7u/ZadzfBGVPN95jZf1LYDWOeqFL5VZfJzHVwmTIku27jibFbop+SG+191ek2oh63GclWDXlPVArEd5cVmCuIp6IT3tmobrMS9Nvc6AQcQFMXIEeUqQSnm2CMD8j53EJ7URWXzqzPgk2jrVSw4BFGILMMazhqJCgc/uI7gNkNCbDt/zo+s8izOW4htbK47eK X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Oct 2026 17:12:25.9327 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a10c4bef-4250-4d18-0057-08df21717f3f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002312.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPF2D39B31FF On Wed, 30 Sep 2026 13:13:25 +0200 "Danilo Krummrich" wrote: > On Wed Sep 30, 2026 at 12:18 PM CEST, Zhi Wang wrote: > > +impl Device> { > > + /// Returns the number of Virtual Functions (VF) enabled for a > > Physical Function (PF). > > + pub fn num_vf(&self) -> i32 { > > For the reasons mentioned in patch 1, I'd make this return u16. > > I suggest to do the converstion with > .try_into().expect("pdev->sriov->num_VFs is u16"). > Got it. Will fix that in the next respin. > > + // SAFETY: `self.as_raw()` is valid and this call runs in > > the PCI core callback context. > > + unsafe { bindings::pci_num_vf(self.as_raw()) } > > + } > > +}