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Sun, 04 Oct 2026 12:10:04 -0700 (PDT) X-Received: by 2002:a05:622a:2288:b0:533:8900:4eb2 with SMTP id d75a77b69052e-533d96e20c4mr164538101cf.58.1791141004155; Sun, 04 Oct 2026 12:10:04 -0700 (PDT) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([37.169.59.74]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a0394ca0f0sm176318385e9.1.2026.10.04.12.10.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Oct 2026 12:10:03 -0700 (PDT) From: Loic Poulain Date: Sun, 04 Oct 2026 21:09:51 +0200 Subject: [PATCH 5/5] i2c: qcom-cci: Extend i2c read limits based on CCI revision Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261004-cci-imp-v1-5-227d12cb4829@oss.qualcomm.com> References: <20261004-cci-imp-v1-0-227d12cb4829@oss.qualcomm.com> In-Reply-To: <20261004-cci-imp-v1-0-227d12cb4829@oss.qualcomm.com> To: Robert Foss , Andi Shyti , Konrad Dybcio Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Loic Poulain X-Mailer: b4 0.14.2 X-Authority-Analysis: v=2.4 cv=cf5HPXDM c=1 sm=1 tr=0 ts=6ac2a48d cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=1Gfya9YG+27Uq/30OuQ23A==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=Q-BVT9UuQ3EDAlpGIL8A:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-ORIG-GUID: LcUHQaFC5I2w9yUkBBnnWJskNVHI8gMw X-Proofpoint-GUID: LcUHQaFC5I2w9yUkBBnnWJskNVHI8gMw X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA0MDA3NiBTYWx0ZWRfX/KYKVW9JxnGp geGjSRa2Nsf6h+DbVMarfTqrB1xS9EqRGIZRrNf8YH7LQsbUv2zMXVFABWrijVN5wwcKAyZ81HM mAY2Zq/JJWdPd44y0BnpRlGgOXdBPqqOLvpjIybGmlVYjo9GSakJTNRa8PN0B/UDiFTAIp685Be U045k7uK+Av2/I/WUy2yf7rKewu8bG58AijKsB/GS3qooqIcPM3s2YKu7AK1IMrWDkejGx+7TYP KvgArWroFN7ZPKmSKZp1EAWn56SKG+mGs6Lo4vKgsclbaLzpqGTLUje4D5tDh7hFEiH/8YWgCmr GD2frAJUIX2Sgif1h29H0VFTJOWzncpjbUFEiTvQh/XUu1Vz+Uf8Ext8KGx63eTU4fM8muILe7h is8sAPSFVbzpCMfsF3TjARjS3TIg6f+9gXVYV9eBCnti6P3JxuzIz4YJQrurRWMP71bnmNwC/h4 GypDUOmuBJwBf440sgw== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA0MDA3NiBTYWx0ZWRfX/xhaF1ARUlFA rIu4lg2VXd9olxJthhosWdR596w+wXkgNQX6fW7aote0h5rigYVN1Km0+DsU+PrzOnQwG9TdpbU JgyoRzn/Vx8h96+WDgEDTAZR4DKkzqg= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-04_05,2026-10-02_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 spamscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 adultscore=0 impostorscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610040076 max_read_len was hardcoded to 12 bytes for all CCI revisions, but this does not reflect the actual hardware limits. Depending on the CCI version, the maximum read size is either 14 bytes (16 - 2) or 254 bytes (256 - 2), corresponding to FIFO_SIZE - 2. Two FIFO bytes are reserved by the hardware, with the first and last bytes used for metadata such as slave ID/address reporting. Add CCI_I2C_READ_MAX_LEN macro to derive max_read_len from each revision's FIFO size instead of hardcoding it and adjust the values according the hardware revisions. Improve the FIFO read procedure, read the first word, discard its ID-echo byte, then drain the remaining words in a plain loop. Switch to readl_relaxed() for the FIFO reads, since the preceding wait_for_completion_timeout() already orders them against the hardware's completion interrupt. Signed-off-by: Loic Poulain --- drivers/i2c/busses/i2c-qcom-cci.c | 37 +++++++++++++++++-------------------- 1 file changed, 17 insertions(+), 20 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c index 9554d42e6b976ef33f6421a98209c2fb837e9698..586283b2cb5f4d54a13e54da70812c1fc033b242 100644 --- a/drivers/i2c/busses/i2c-qcom-cci.c +++ b/drivers/i2c/busses/i2c-qcom-cci.c @@ -104,6 +104,9 @@ (((qsize) - CCI_I2C_BURST_OVERHEAD) / CCI_I2C_WRITE_WC * \ CCI_I2C_WRITE_MAX_LEN) +/* The first and last bytes are reserved - not payload */ +#define CCI_I2C_READ_MAX_LEN(fsize) ((fsize) - 2) + enum { I2C_MODE_STANDARD, I2C_MODE_FAST, @@ -483,7 +486,6 @@ static int cci_i2c_read(struct cci *cci, u16 master, u32 val, words_read, words_exp; u8 queue = QUEUE_1; int i, index = 0, ret; - bool first = true; /* * Call validate queue to make sure queue is empty before starting. @@ -511,21 +513,16 @@ static int cci_i2c_read(struct cci *cci, u16 master, return -EIO; } - do { - val = readl(cci->base + CCI_I2C_Mm_READ_DATA(master)); - - for (i = 0; i < 4 && index < len; i++) { - if (first) { - /* The LS byte of this register represents the - * first byte read from the slave during a read - * access. - */ - first = false; - continue; - } + /* The first byte of the read is the slave ID echo, not payload */ + val = readl_relaxed(cci->base + CCI_I2C_Mm_READ_DATA(master)); + for (i = 1; i < 4 && index < len; i++) + buf[index++] = (val >> (i * 8)) & 0xff; + + while (--words_read) { + val = readl_relaxed(cci->base + CCI_I2C_Mm_READ_DATA(master)); + for (i = 0; i < 4 && index < len; i++) buf[index++] = (val >> (i * 8)) & 0xff; - } - } while (--words_read); + } return 0; } @@ -730,7 +727,7 @@ static const struct cci_data cci_hw_catalog[] = { .queue_size = { 64, 16 }, .quirks = { .max_write_len = 10, - .max_read_len = 12, + .max_read_len = CCI_I2C_READ_MAX_LEN(16), }, }, { @@ -739,7 +736,7 @@ static const struct cci_data cci_hw_catalog[] = { .queue_size = { 64, 16 }, .quirks = { .max_write_len = CCI_I2C_BURST_MAX_LEN(64), - .max_read_len = 12, + .max_read_len = CCI_I2C_READ_MAX_LEN(16), }, }, { @@ -748,7 +745,7 @@ static const struct cci_data cci_hw_catalog[] = { .queue_size = { 128, 32 }, .quirks = { .max_write_len = CCI_I2C_BURST_MAX_LEN(128), - .max_read_len = 12, + .max_read_len = CCI_I2C_READ_MAX_LEN(16), }, }, { @@ -757,7 +754,7 @@ static const struct cci_data cci_hw_catalog[] = { .queue_size = { 128, 32 }, .quirks = { .max_write_len = CCI_I2C_BURST_MAX_LEN(128), - .max_read_len = 12, + .max_read_len = CCI_I2C_READ_MAX_LEN(256), }, }, { @@ -766,7 +763,7 @@ static const struct cci_data cci_hw_catalog[] = { .queue_size = { 1024, 32 }, .quirks = { .max_write_len = CCI_I2C_BURST_MAX_LEN(1024), - .max_read_len = 12, + .max_read_len = CCI_I2C_READ_MAX_LEN(256), }, }, }; -- 2.34.1