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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [RFC PATCH 6/6] arm64: dts: amlogic: t7: khadas-vim4: enable the ethernet port Date: Sun, 4 Oct 2026 15:40:46 +0100 Message-ID: <20261004144046.391444-7-tanure@linux.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261004144046.391444-1-tanure@linux.com> References: <20261004144046.391444-1-tanure@linux.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The board carries a Realtek RTL8211F gigabit PHY on the external management bus, connected to the MAC over RGMII. Enable the controller, hand it the ethernet pins and point it at the PHY. The clock delays RGMII needs are supplied by the MAC rather than the PHY: 2ns on transmit and 2000ps on receive, the values the vendor kernel programs. The PHY interrupt output is wired to GPIOH_6, so describe it and let link changes be reported instead of polled. The PHY reset pin is driven by an RC network on the board, not by the SoC, so there is no reset line to describe. Tested at 930Mbit/s sustained receive over a minute, with no MAC error counters moving in either direction. Assisted-by: LLM Signed-off-by: Lucas Tanure --- .../amlogic/amlogic-t7-a311d2-khadas-vim4.dts | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts index 0fa83362b417..5d0365ddde72 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts +++ b/arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-khadas-vim4.dts @@ -14,6 +14,7 @@ / { compatible = "khadas,vim4", "amlogic,a311d2", "amlogic,t7"; aliases { + ethernet0 = ðmac; serial0 = &uart_a; mmc0 = &sd_emmc_c; mmc1 = &sd_emmc_b; @@ -256,6 +257,33 @@ xtal: xtal-clk { }; }; +ðmac { + status = "okay"; + pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; + pinctrl-names = "default"; + + /* + * The RGMII clock delays are added by the MAC, so the PHY is + * asked for the mode that adds none. + */ + phy-mode = "rgmii"; + phy-handle = <&external_phy>; + amlogic,tx-delay-ns = <2>; + rx-internal-delay-ps = <2000>; +}; + +&ext_mdio { + external_phy: ethernet-phy@0 { + /* Realtek RTL8211FD-CG */ + reg = <0>; + max-speed = <1000>; + + interrupt-parent = <&gpio_intc>; + /* RGMII_INT on GPIOH_6 */ + interrupts = <154 IRQ_TYPE_LEVEL_LOW>; + }; +}; + &i2c_m_ao_a { status = "okay"; pinctrl-0 = <&i2c0_ao_d_pins>; -- 2.56.0