From: Paul Cercueil <paul.cercueil@bootlin.com>
To: Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <mwalle@kernel.org>,
Takahiro Kuwano <takahiro.kuwano@infineon.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Mark Brown <broonie@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Kees Cook <kees@kernel.org>, Tony Luck <tony.luck@intel.com>,
"Guilherme G . Piccoli" <gpiccoli@igalia.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, Tanmay Jagdale <tanmay@marvell.com>,
Paul Cercueil <paul.cercueil@bootlin.com>
Subject: [PATCH 5/5] spi: cadence-xspi: Add support for panic writes
Date: Mon, 5 Oct 2026 10:11:40 +0200 [thread overview]
Message-ID: <20261005081141.33688-6-paul.cercueil@bootlin.com> (raw)
In-Reply-To: <20261005081141.33688-1-paul.cercueil@bootlin.com>
From: Tanmay Jagdale <tanmay@marvell.com>
Advertise support for panic writes. When a memory op is received with
the 'panic' flag set, the driver will then work without relying on
interrupts and without sleeping.
Signed-off-by: Tanmay Jagdale <tanmay@marvell.com>
Co-developed-by: Paul Cercueil <paul.cercueil@bootlin.com>
Signed-off-by: Paul Cercueil <paul.cercueil@bootlin.com>
---
drivers/spi/spi-cadence-xspi.c | 26 ++++++++++++++++++--------
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-cadence-xspi.c b/drivers/spi/spi-cadence-xspi.c
index 09ed2afbd4af..0b7162740940 100644
--- a/drivers/spi/spi-cadence-xspi.c
+++ b/drivers/spi/spi-cadence-xspi.c
@@ -350,10 +350,11 @@ struct cdns_xspi_dev {
void (*set_interrupts_handler)(struct cdns_xspi_dev *cdns_xspi, bool enabled);
bool xfer_in_progress;
+ bool panic_write;
int current_xfer_qword;
};
-static int cdns_xspi_wait_for_controller_idle(struct cdns_xspi_dev *cdns_xspi)
+static int cdns_xspi_wait_for_controller_idle(struct cdns_xspi_dev *cdns_xspi, bool sleep)
{
u32 ctrl_stat;
@@ -362,7 +363,7 @@ static int cdns_xspi_wait_for_controller_idle(struct cdns_xspi_dev *cdns_xspi)
ctrl_stat,
((ctrl_stat &
CDNS_XSPI_CTRL_BUSY) == 0),
- 100, 1000);
+ sleep ? 100 : 0, 1000);
}
static bool cdns_xspi_is_stig_ready(struct cdns_xspi_dev *cdns_xspi, bool sleep)
@@ -549,7 +550,7 @@ static int cdns_xspi_send_stig_command(struct cdns_xspi_dev *cdns_xspi,
int ret;
int dummybytes = op->dummy.nbytes;
- ret = cdns_xspi_wait_for_controller_idle(cdns_xspi);
+ ret = cdns_xspi_wait_for_controller_idle(cdns_xspi, !op->panic_write);
if (ret < 0)
return -EIO;
@@ -586,23 +587,23 @@ static int cdns_xspi_send_stig_command(struct cdns_xspi_dev *cdns_xspi,
cdns_xspi_trigger_command(cdns_xspi, cmd_regs);
- if (cdns_xspi->irq >= 0) {
+ if (cdns_xspi->irq >= 0 && !op->panic_write) {
wait_for_completion(&cdns_xspi->sdma_complete);
if (cdns_xspi->sdma_error) {
cdns_xspi->set_interrupts_handler(cdns_xspi, false);
return -EIO;
}
- } else if (!cdns_xspi_is_sdma_ready(cdns_xspi, true)) {
+ } else if (!cdns_xspi_is_sdma_ready(cdns_xspi, !op->panic_write)) {
return -EIO;
}
cdns_xspi->sdma_handler(cdns_xspi);
}
- if (cdns_xspi->irq >= 0) {
+ if (cdns_xspi->irq >= 0 && !op->panic_write) {
wait_for_completion(&cdns_xspi->cmd_complete);
cdns_xspi->set_interrupts_handler(cdns_xspi, false);
- } else if (!cdns_xspi_is_stig_ready(cdns_xspi, true)) {
+ } else if (!cdns_xspi_is_stig_ready(cdns_xspi, !op->panic_write)) {
return -EIO;
}
@@ -622,6 +623,8 @@ static int cdns_xspi_mem_op(struct cdns_xspi_dev *cdns_xspi,
if (cdns_xspi->cur_cs != spi_get_chipselect(mem->spi, 0))
cdns_xspi->cur_cs = spi_get_chipselect(mem->spi, 0);
+ cdns_xspi->panic_write = op->panic_write;
+
return cdns_xspi_send_stig_command(cdns_xspi, op,
(dir != SPI_MEM_NO_DATA));
}
@@ -831,9 +834,11 @@ static bool cdns_xspi_is_dll_locked(struct cdns_xspi_dev *cdns_xspi)
{
u32 dll_lock;
+ /* Busy-wait in case we wake up the PHY from suspend to do a panic write */
return !readl_relaxed_poll_timeout(cdns_xspi->iobase +
CDNS_XSPI_INTR_STATUS_REG,
- dll_lock, ((dll_lock & CDNS_XSPI_DLL_LOCK) == 1), 10, 10000);
+ dll_lock, ((dll_lock & CDNS_XSPI_DLL_LOCK) == 1),
+ cdns_xspi->panic_write ? 0 : 10, 10000);
}
/* Static configuration of PHY */
@@ -1186,6 +1191,10 @@ static int cdns_xspi_transfer_one_message_b0(struct spi_controller *controller,
}
#endif
+static const struct spi_controller_mem_caps cdns_xspi_mem_caps = {
+ .panic_write = true,
+};
+
static int cdns_xspi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -1306,6 +1315,7 @@ static int cdns_xspi_probe(struct platform_device *pdev)
}
host->num_chipselect = 1 << cdns_xspi->hw_num_banks;
+ host->mem_caps = &cdns_xspi_mem_caps;
ret = devm_spi_register_controller(dev, host);
if (ret) {
--
2.47.3
next prev parent reply other threads:[~2026-10-05 8:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-05 8:11 [PATCH 0/5] spi: Add support for panic mem writes Paul Cercueil
2026-10-05 8:11 ` [PATCH 1/5] spi: spi-mem: " Paul Cercueil
2026-10-05 8:24 ` sashiko-bot
2026-10-05 8:11 ` [PATCH 2/5] mtd: spi-nor: Add support for panic writes Paul Cercueil
2026-10-05 8:23 ` sashiko-bot
2026-10-05 8:11 ` [PATCH 3/5] spi: cadence-xspi: Add irq-less support Paul Cercueil
2026-10-05 8:24 ` sashiko-bot
2026-10-05 8:11 ` [PATCH 4/5] spi: cadence-xspi: Don't use infinite timeout in register poll Paul Cercueil
2026-10-05 8:21 ` sashiko-bot
2026-10-05 8:11 ` Paul Cercueil [this message]
2026-10-05 8:26 ` [PATCH 5/5] spi: cadence-xspi: Add support for panic writes sashiko-bot
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