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Mon, 5 Oct 2026 01:56:25 -0700 Received: from build-sheetal-noble-20260902.internal (10.127.8.14) by mail.nvidia.com (10.129.68.7) with Microsoft SMTP Server id 15.2.2562.49 via Frontend Transport; Mon, 5 Oct 2026 01:56:24 -0700 From: Sheetal To: Liam Girdwood , Mark Brown CC: Jaroslav Kysela , Takashi Iwai , "Thierry Reding" , Jonathan Hunter , Sameer Pujar , Kuninori Morimoto , Mohan Kumar , , , , Sheetal , Thierry Reding Subject: [PATCH] ASoC: tegra: Fix ASRC Stream6 input threshold control Date: Mon, 5 Oct 2026 08:55:59 +0000 Message-ID: <20261005085559.2134401-1-sheetal@nvidia.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7E:EE_|CY5PR12MB6527:EE_ X-MS-Office365-Filtering-Correlation-Id: 704d3846-b924-45f9-74bb-08df22be93c4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|23010399003|36860700016|376014|18002099003|11063799006|10067099003|56012099006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: egEXT/TpdDOrCNJW7BxTFdksrlrRpLvo8dV++lem6lT+j35Nka4/nKLgogLx5jeZuCR8SyxAEZDnBiPQJxFBP3P7Rt8iy3Zarw5IA6feiQNsCIa76WZpdC2rerjZ1mj9OT2yqcS+4NocLLlLzom5BtCEOQrY1Y36wXi+bgkf5cS6EWcIpSBEY7gx+FAQoj5NotZIWU4SU55m9Nm+B9reOESDCMZitGKXMNw4naOFitFKNRJaAWF0Avl702aTxBJTyFXjhCy75s4+yPzjxRMB7/av5gubm0JnvJXWbA+lX0OzeTT6y+RJrklNGrVntCDPaPqTNwSloX/YFGD7CflhYw2m9mzk8GZSrwyzcgNx2uo+qE2KWu0Oat1AoP+FFf1atwffIWpfOg1584FcWZhSSgjLrPuaN3k5ky4mVCAm9+9aUDKuWieL8COQ3UG4nikb X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Oct 2026 08:56:42.6669 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 704d3846-b924-45f9-74bb-08df22be93c4 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7E.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6527 The Stream6 Input Threshold control points at stream index 4, which is already used by Stream5. The threshold get and put callbacks derive the lane ID from the register offset, so the duplicate index makes Stream6 operate on lane 4 and leaves lane 5 inaccessible from userspace. Use stream index 5 for Stream6. Fixes: a2df8c2d5b36 ("ASoC: tegra: Add Tegra186 based ASRC driver") Reviewed-by: Thierry Reding Signed-off-by: Sheetal --- Changes from RFC v1: - Split out from the ASRC ratio-control RFC series because this is an independent fix and should not be blocked by the ABI discussion. sound/soc/tegra/tegra186_asrc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/tegra/tegra186_asrc.c b/sound/soc/tegra/tegra186_asrc.c index 7f360dfaf8b1..d8ae5d997615 100644 --- a/sound/soc/tegra/tegra186_asrc.c +++ b/sound/soc/tegra/tegra186_asrc.c @@ -828,7 +828,7 @@ static const struct snd_kcontrol_new tegra186_asrc_controls[] = { tegra186_asrc_put_input_threshold), SOC_SINGLE_EXT("Stream6 Input Threshold", - ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, 4), 0, 3, 0, + ASRC_STREAM_REG(TEGRA186_ASRC_RX_THRESHOLD, 5), 0, 3, 0, tegra186_asrc_get_input_threshold, tegra186_asrc_put_input_threshold), -- 2.43.0