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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-15d85781d49sm4017403c88.16.2026.10.05.22.29.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2026 22:29:24 -0700 (PDT) From: Varadarajan Narayanan Subject: [PATCH v5 0/6] Add support for USB phys in IPQ9650 Date: Tue, 06 Oct 2026 10:59:14 +0530 Message-Id: <20261006-phy-v5-0-cbe9330a6449@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIACqHxGoC/3XPz46DIBAG8FcxnJdmGNBqT32PpgfAcSXZagvWa BrfvYjdP4fthWQIv+8bHiyQdxTYIXswT6MLru/ikH9kzLa6+yTu6jgzBCygRODXduZFoajOyQJ WyOLLq6fGTSnldN5mT7d7DBu2S2Z0IG77y8UNh6yjaeBroADI2QpaF4bez2mLUSTxKlSpcBQcO Ob7uii1RAHm2Iewu93115q5i0eKGfGXViA2ipFaW8kaG2mEad5Q+Yd+t8pIoSxpbwhso/Ubqn7 o+qGNqkgNKKsESrJG/kOXZXkCKK72Y38BAAA= X-Change-ID: 20260820-phy-664ed5ec0292 To: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Manu Gautam , Stephen Boyd , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , Krzysztof Kozlowski , Abel Vesa , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA2MDAyMSBTYWx0ZWRfX2u4BRg3sBzAw l2GbboM5LFzpXDpRS0zSXvxkUgyiDqkKBAqY1QP2FxwWYWnbt3Z0F6iVRRlgXh3WJeYuV2FuSQ9 +RJbr1LL1qsaWoWA/2CeYp77p3cNadI= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA2MDAyMSBTYWx0ZWRfX9QulKEtWoz3Q a+lz++PogucBO+TMoRwQbAJDNkhR9oCTcH24Xf2AR2mUftNiZ4mjMVxL2s98THbnGlIowzd3GCc PXmr8Z2rwG/w+MC6GMVk6Oeo1jSVzbbYnZG6e6pskuqRbY+kEbFisnLwa534x8eaax7vklLWALV D+Yo2p/aF7Vzei4uooNSuzywObDLr7oqAef0vjhHQ9jGW8hLVcx1A7g9G7a+SZ4qK9aTb7S8GKC HkocM8GdQdSi5fky1JQ1naG5KheWtj3UiKY0EAfD48t7FGmmBYeQbbjLstwn2s9ETCciQiG4Gp0 i+TTROB+Gel+flaCysocp/TZlgFzFUqRa8We+Dm8muUIcbpQJSIc4Gnkqdi1HT66ZcnXVWii6nG gmAZqAnchUnC3N9bpry+/gN8rXcxUcii18MT+kOrovosDfrX5Puf8DrO2bZ6MN4YCcsZJsNniA2 ClicpLcK0tXHEFblzzw== X-Proofpoint-GUID: oEN9SEklep10iHtLdYn2LvBJ6Z_EZ1en X-Authority-Analysis: v=2.4 cv=SvwFe/O0 c=1 sm=1 tr=0 ts=6ac48737 cx=c_pps a=SvEPeNj+VMjHSW//kvnxuw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=tpprtx7nRKxrkFoMJnUA:9 a=QEXdDO2ut3YA:10 a=Kq8ClHjjuc5pcCNDwlU0:22 X-Proofpoint-ORIG-GUID: oEN9SEklep10iHtLdYn2LvBJ6Z_EZ1en X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-06_01,2026-10-05_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 spamscore=0 adultscore=0 malwarescore=0 clxscore=1015 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610060021 This series - Adds dt-bindings and driver changes for the high speed and super speed phys in IPQ9650. - IPQ9650 specific init tables to QMP super speed phy driver. - The Femto high speed phy driver is refactored to accomodate differences in the init sequences between SoCs first and then support for IPQ9650 is included. Signed-off-by: Varadarajan Narayanan --- Changes in v5: - Use FIELD_PREP_CONST to define FSEL_24MHZ - Change commit subject to 'Fix order of arguments to qcom_snps_hsphy_write_mask' - Use data->{pre,post}_tuning in qcom_snps_hsphy_init() instead of a temporary local variable - Pick R-b from Dmitry for two patches - Link to v4: https://lore.kernel.org/r/20261005-phy-v4-0-b04c4123ecb3@oss.qualcomm.com Changes in v4: - Rebase to top of tree - Split 4th patch 'phy: qcom: snps-femto-v2: Move PHY init registers to config tables' as follows: phy: qcom: snps-femto-v2: Fix qcom_snps_hsphy_write_mask argument mixup phy: qcom: snps-femto-v2: Move PHY init registers to config tables - Link to v3: https://lore.kernel.org/r/20260924-phy-v3-0-088e7be0cfaa@oss.qualcomm.com Changes in v3: - No code changes - Rebase to top of tree - Pick two R-b tags - Link to v2: https://lore.kernel.org/r/20260901-phy-v2-0-cc93d2f3b1bf@oss.qualcomm.com Changes in v2: - Pick one R-b from Krzysztof - Use qcom,ipq9650-usb-hs-phy directly instead of adding a 6nm compatible and falling back to it - Change pre/post to pre_tuning/post_tuning - Use array count instead of terminating entries - Fix value/mask mixup in 2 places - Link to v1: https://lore.kernel.org/r/20260824-phy-v1-0-257d68a3210b@oss.qualcomm.com --- Varadarajan Narayanan (6): dt-bindings: phy: qcom,qmp-usb: Add IPQ9650 USB3 PHY dt-bindings: phy: qcom,usb-snps-femto-v2: Add IPQ9650 compatible phy: qcom: qmp-usb: Add IPQ9650 USB3 PHY configuration phy: qcom: snps-femto-v2: Fix order of arguments to qcom_snps_hsphy_write_mask phy: qcom: snps-femto-v2: Move PHY init registers to config tables phy: qcom: snps-femto-v2: Add IPQ9650 support .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 2 + .../bindings/phy/qcom,usb-snps-femto-v2.yaml | 2 + drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 118 +++++++++++++ drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 193 ++++++++++++++++----- 4 files changed, 268 insertions(+), 47 deletions(-) --- base-commit: 15551282e82db772bfc862f96a8abf14a60f4ea5 change-id: 20260820-phy-664ed5ec0292 Best regards, -- Varadarajan Narayanan