From: Chi-Wen Weng <cwweng.linux@gmail.com>
To: broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
cwweng@nuvoton.com, cwweng.linux@gmail.com
Subject: [PATCH] spi: dt-bindings: nuvoton,ma35d1-qspi: Drop redundant SPI example
Date: Tue, 6 Oct 2026 14:36:43 +0800 [thread overview]
Message-ID: <20261006063643.198830-1-cwweng.linux@gmail.com> (raw)
From: Chi-Wen Weng <cwweng@nuvoton.com>
The SPI and QSPI controllers use the same Devicetree node structure.
The additional SPI example only differs in property values and does not
demonstrate any binding-specific behavior.
Drop the redundant SPI example and keep the existing QSPI example.
Signed-off-by: Chi-Wen Weng <cwweng@nuvoton.com>
---
.../bindings/spi/nuvoton,ma35d1-qspi.yaml | 20 -------------------
1 file changed, 20 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
index 72f2e1e1219a..9ee61f8ac4d6 100644
--- a/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
+++ b/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml
@@ -75,24 +75,4 @@ examples:
};
};
- - |
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
- #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
-
- soc {
- #address-cells = <2>;
- #size-cells = <2>;
-
- spi@40600000 {
- compatible = "nuvoton,ma35d1-spi";
- reg = <0 0x40600000 0 0x10000>;
- interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk SPI0_GATE>;
- resets = <&sys MA35D1_RESET_SPI0>;
-
- #address-cells = <1>;
- #size-cells = <0>;
- };
- };
...
base-commit: 4825287f6d2346e9273f35a928d1ef40e68bc58b
--
2.25.1
reply other threads:[~2026-10-06 6:36 UTC|newest]
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