From: Liviu Nicoara <lnicoara@thinkoid.org>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Abel Vesa <abelvesa@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Aleksandrs Vinarskis <alex@vinarskis.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH] arm64: dts: qcom: x1e80100-dell-xps13-9345: Add thermal zones
Date: Tue, 6 Oct 2026 14:55:57 -0400 [thread overview]
Message-ID: <20261006185557.23016-1-lnicoara@thinkoid.org> (raw)
The XPS 13 9345 has seven board thermistors on the PMK8550 VADC: AMUX1
to AMUX5 THM and AMUX1 and AMUX2 GPIO, each with a 100k pull-up. The
ADC configuration in Dell's Windows driver package lists the same seven
channels, SYS_THERM1 to SYS_THERM7.
The ACPI tables define seven ADC thermal zones, TZ31 to TZ37. Three
of them, TZ32 to TZ34, carry passive trips that throttle all CPUs and
the GPU; the other four sit at 100 C. The tables do not name a zone's
channel. Taken in SYS_THERM order, TZ32 to TZ34 are AMUX2 GPIO, AMUX1
THM and AMUX2 THM. Heating the board confirms two of the three: a
charger on the left port warms AMUX2 GPIO, one on the right port warms
AMUX2 THM. Sustained SSD reads, compared against a CPU-only load, warm
AMUX3 THM and AMUX2 GPIO beyond the other channels; the second is the
left charger's, so the first is named for the SSD.
The passive trips follow the thermal mode chosen in the BIOS setup
(Thermal Management: Optimized, Cool, Quiet or Ultra Performance),
which the EC reports and which cannot be read without an EC driver.
Use the values of Optimized, the default: 53.8 C on the left charger,
62.8 C on AMUX1 THM, 61.8 C on the right charger. The critical trips
are the tables' 114.8 C. The other four channels get report-only
zones, as on the CRD, and all seven are put in thermal-monitor mode.
Assisted-by: LLM
Signed-off-by: Liviu Nicoara <lnicoara@thinkoid.org>
---
Notes:
Tested on v7.2.6 with the ADC_TM driver (7.3-rc1) and aac6b2ca472e
backported: the seven zones read within 0.01 C of their IIO channels.
With the left charger's passive trip moved just above the zone and a
single-core load, the crossing throttled all three CPU clusters and the
GPU through the ADC_TM threshold interrupt, and the throttle released
at the trip less its hysteresis. Built and checked with dtbs_check on
qcom arm64-for-7.4; no new warnings.
.../dts/qcom/x1e80100-dell-xps13-9345.dts | 168 ++++++++++++++++++
1 file changed, 168 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
index f48e6bc35006..a3a240b6927c 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
@@ -326,6 +326,144 @@ vreg_wcn_3p3: regulator-wcn-3p3 {
regulator-boot-on;
};
+ thermal-zones {
+ thm1-thermal {
+ critical-action = "shutdown";
+ polling-delay-passive = <1000>;
+
+ thermal-sensors = <&pmk8550_vadc ADC5_GEN3_AMUX1_THM_100K_PU(1)>;
+
+ trips {
+ thm1_alert0: trip-point0 {
+ temperature = <62800>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ thm1-critical {
+ temperature = <114800>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&thm1_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu8 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu9 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ chg-right-thermal {
+ critical-action = "shutdown";
+ polling-delay-passive = <1000>;
+
+ thermal-sensors = <&pmk8550_vadc ADC5_GEN3_AMUX2_THM_100K_PU(1)>;
+
+ trips {
+ chg_right_alert0: trip-point0 {
+ temperature = <61800>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ chg-right-critical {
+ temperature = <114800>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&chg_right_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu8 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu9 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ ssd-thermal {
+ thermal-sensors = <&pmk8550_vadc ADC5_GEN3_AMUX3_THM_100K_PU(1)>;
+ };
+
+ thm4-thermal {
+ thermal-sensors = <&pmk8550_vadc ADC5_GEN3_AMUX4_THM_100K_PU(1)>;
+ };
+
+ thm5-thermal {
+ thermal-sensors = <&pmk8550_vadc ADC5_GEN3_AMUX5_THM_100K_PU(1)>;
+ };
+
+ gpio-thm1-thermal {
+ thermal-sensors = <&pmk8550_vadc ADC5_GEN3_AMUX1_GPIO_100K_PU(1)>;
+ };
+
+ chg-left-thermal {
+ critical-action = "shutdown";
+ polling-delay-passive = <1000>;
+
+ thermal-sensors = <&pmk8550_vadc ADC5_GEN3_AMUX2_GPIO_100K_PU(1)>;
+
+ trips {
+ chg_left_alert0: trip-point0 {
+ temperature = <53800>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+
+ chg-left-critical {
+ temperature = <114800>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&chg_left_alert0>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu8 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu9 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu10 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu11 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
wcn7850-pmu {
compatible = "qcom,wcn7850-pmu";
@@ -1025,6 +1163,36 @@ rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state {
};
};
+&pmk8550_vadc {
+ channel@144 {
+ qcom,adc-tm;
+ };
+
+ channel@145 {
+ qcom,adc-tm;
+ };
+
+ channel@146 {
+ qcom,adc-tm;
+ };
+
+ channel@147 {
+ qcom,adc-tm;
+ };
+
+ channel@148 {
+ qcom,adc-tm;
+ };
+
+ channel@14a {
+ qcom,adc-tm;
+ };
+
+ channel@14b {
+ qcom,adc-tm;
+ };
+};
+
&qupv3_0 {
status = "okay";
};
base-commit: 7ee8eb0ebeef2e7bbf2ec8ebc43bf43f2a10a1d7
--
2.55.0
reply other threads:[~2026-10-06 18:56 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261006185557.23016-1-lnicoara@thinkoid.org \
--to=lnicoara@thinkoid.org \
--cc=abelvesa@kernel.org \
--cc=alex@vinarskis.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®