From: Tomer Maimon <tmaimon77@gmail.com>
To: andrew@codeconstruct.com.au, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org
Cc: openbmc@lists.ozlabs.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, avifishman70@gmail.com,
tmaimon77@gmail.com, tali.perry1@gmail.com, venture@google.com,
yuenn@google.com, benjaminfair@google.com
Subject: [PATCH RESEND v10 3/6] arm64: dts: nuvoton: npcm845: Reorder timer0 and PECI nodes
Date: Wed, 7 Oct 2026 10:26:42 +0300 [thread overview]
Message-ID: <20261007072645.1618147-4-tmaimon77@gmail.com> (raw)
In-Reply-To: <20261007072645.1618147-1-tmaimon77@gmail.com>
Move the timer0 and PECI nodes so the APB children are ordered by
ascending unit address.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
---
.../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 32 +++++++++----------
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
index a92fbd3..542f27e 100644
--- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
+++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
@@ -58,22 +58,6 @@
interrupt-parent = <&gic>;
ranges = <0x0 0x0 0xf0000000 0x00300000>;
- peci: peci-controller@100000 {
- compatible = "nuvoton,npcm845-peci";
- reg = <0x100000 0x1000>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk NPCM8XX_CLK_APB3>;
- cmd-timeout-ms = <1000>;
- status = "disabled";
- };
-
- timer0: timer@8000 {
- compatible = "nuvoton,npcm845-timer";
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x8000 0x1C>;
- clocks = <&refclk>;
- };
-
serial0: serial@0 {
compatible = "nuvoton,npcm845-uart", "nuvoton,npcm750-uart";
reg = <0x0 0x1000>;
@@ -137,6 +121,13 @@
status = "disabled";
};
+ timer0: timer@8000 {
+ compatible = "nuvoton,npcm845-timer";
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ reg = <0x8000 0x1C>;
+ clocks = <&refclk>;
+ };
+
watchdog0: watchdog@801c {
compatible = "nuvoton,npcm845-wdt", "nuvoton,npcm750-wdt";
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
@@ -161,6 +152,15 @@
clocks = <&refclk>;
};
+ peci: peci-controller@100000 {
+ compatible = "nuvoton,npcm845-peci";
+ reg = <0x100000 0x1000>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk NPCM8XX_CLK_APB3>;
+ cmd-timeout-ms = <1000>;
+ status = "disabled";
+ };
+
};
apb@fff00000 {
--
2.34.1
next prev parent reply other threads:[~2026-10-07 7:26 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-07 7:26 [PATCH RESEND v10 0/6] arm64: dts: nuvoton: add NPCM845 SoC and EVB support Tomer Maimon
2026-10-07 7:26 ` [PATCH RESEND v10 1/6] arm64: dts: nuvoton: npcm845: Drop redundant timer clock-names Tomer Maimon
2026-10-07 7:26 ` [PATCH RESEND v10 2/6] arm64: dts: nuvoton: npcm845: Split APB address ranges Tomer Maimon
2026-10-07 7:26 ` Tomer Maimon [this message]
2026-10-07 7:26 ` [PATCH RESEND v10 4/6] arm64: dts: nuvoton: npcm845: Add peripheral nodes Tomer Maimon
2026-10-07 7:26 ` [PATCH RESEND v10 5/6] arm64: dts: nuvoton: npcm845-evb: Fix DTS coding style Tomer Maimon
2026-10-07 7:26 ` [PATCH RESEND v10 6/6] arm64: dts: nuvoton: npcm845-evb: Add peripheral nodes Tomer Maimon
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