From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BBF81391E6D for ; Wed, 7 Oct 2026 07:27:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.43 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791358024; cv=none; b=GmNrEnVKBWS8uyhqaFlhDmy+WaqRKou5beSW9oNXUsF4E4GHKIf17xh+uCaTs4WokZkpYOSs/wxLD4kIW5n28tI64VFQ8v2q1sYsyyVA0HgNP1fD4MiYHok18mfWpTvjpvIoLIUBb1aRR+SftJaoayPNK9/9bydAQiCZtkVQjiY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791358024; c=relaxed/simple; bh=/Xlw1yXXRMt1l5wcYsv9qXfXuz8/nnY6w/1VhT0CMIE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jBNThHOZVpZLj8Iw88QlZeh0lpx0Ov9DzHv2lOwxvZ8uC0E6OG38BhgYboLlrOmpWTjX53zbtnzq+lJXR6903gcDEtW0/89SVilFfdlxu1C1kr5rvXRrLd/8nR6rnI5ESOKQbhNBVcBjQCF18bF7zHifmN7uuuhHgcSYy8scodc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=f+cmKu1p; arc=none smtp.client-ip=209.85.128.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="f+cmKu1p" Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-4a018792ab3so14098615e9.0 for ; Wed, 07 Oct 2026 00:27:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1791358020; x=1791962820; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=ig29MIOOBV8Rmj9E+dGol59CZnGSjUQe7n7fdjgvlLg=; b=f+cmKu1piUTsrq4u0y+fY87+P2nSBzX4hNyhHxbMzFkPJYbGG16sJpTu8sdHxqe60S qp/M/dN4Zz8QLjYN5Q7qR3YiX8p6yyR3tMeOK/BOe3ZVSedt/3MVD5XhT42/65Nwk5Oc I7fEmsRYlcE7OWOsGAoBcbU2SSXyOWywxYxNthsEPcHG86PhIGostxiKQa/bfec7K2pm 2labF8rmeOdqou50Sw9Sf+jf8977kCEvgaNcx43Xyb/c7gqVmUF5mNP6DdIm/th1+VT3 KhubUhepY9F2BAxP3OyxVbs4TdriZdb11DzwSP+zmLctYon0PE1D8ythAX8E8Elrld3g YUCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1791358020; x=1791962820; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=ig29MIOOBV8Rmj9E+dGol59CZnGSjUQe7n7fdjgvlLg=; b=uQTsbAz3vokOvqGfruuWPmgNpUckW+ajiqcVYRHDOGwNb/nrt9/4qa2aWPiBFG4Vc5 fgiqjjVzH6glFU7G3yjfdG2rLatYRKrmX6eTxeZzUCntyIpVnsQiJjRIHIj2uY2scgJv bu4D5ScBGxH0oH2AU1RGGSWHuiPIX5AN0OslkHUN+WLXmIqkcooLJpySg15xKT0IFyOG jJsn0Du8TzBLDZn+tVn29TH24o2deBuZZjZJDL8nrglLhvj/L+y1H4gHsP0qpA77z7vV Dx8wHKdpRPmfIVFzIImQS7SSqoVsWSwvH4M2mtgfvmgDgfPgob123ccNyz5Ip/MtFCGQ d3Sg== X-Forwarded-Encrypted: i=1; AKwUvBwJR2E9fFxlAictreb1kBUjj15Y1Lg+UTE3SfxXZr72zznAvxsG0ZDGw7E56+ZdZvsI6kdNMVbHr2+1HOc=@vger.kernel.org X-Gm-Message-State: AFuF++lR4k2afz6tD6KMQT4bJwptA9TbZ9mtvk1/Dt72c4I6tGIQVZmQ JzUVs5GfYzLRGM0S9UC3T5UKZR9m/fkbaLTMX3OxPcx0H7QCLPBS5nFjFM/5Gg== X-Gm-Gg: AYBFou0RSfuszXINOp7d9h78ilwTIHM2hkZ8id6AQPuAyJf32iMYO09jEjM9GLk5K2P e1iBbK07QFOg7yN4tWLjgL63ZptU2hv78I+2iptjVgJo/7CFxX7jJts8M+kYcvOsJZdZvxj08/X S/0v+hJNPT4IHNyFbZuK1SjNORGPRIdQvarOVXiODyPUGkv+3nWzu9qg9luQFSY3xQlogmZDNcH P9E6+REg6LU/Sk1g6JC4NN35cU7t3pFEcMjL3B/SForGn06TUCD3D6cJhY7AyatUsNhk5r91jBy HpKjWPWtbCauWLtdVwCRG8ODHbuwXfWKUHE5ei3fav++XM1e1ZVxQpYWSxgokWN1rMr1R83j9sS 1nuwj2jLJmSvcu0bAg6hKd9teKXe9ZbVXcN5O4W3CHEPNh7A/rOsnNPLH6HOzokQwCGb3qBO4KC XwLVNLuKyAxC6XNMPtXc/Lq73pEH75gpBCLT6djI+i3lXGQCJTTjn7LQXnOxyWijfuDaTkYZWdm 7uLPeJh X-Received: by 2002:a05:600c:524c:b0:49e:6683:d23c with SMTP id 5b1f17b1804b1-4a180085842mr18509485e9.0.1791358019546; Wed, 07 Oct 2026 00:26:59 -0700 (PDT) Received: from taln60.nuvoton.co.il ([212.199.177.18]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a180310c9fsm29912955e9.4.2026.10.07.00.26.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Oct 2026 00:26:59 -0700 (PDT) From: Tomer Maimon To: andrew@codeconstruct.com.au, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, avifishman70@gmail.com, tmaimon77@gmail.com, tali.perry1@gmail.com, venture@google.com, yuenn@google.com, benjaminfair@google.com Subject: [PATCH RESEND v10 4/6] arm64: dts: nuvoton: npcm845: Add peripheral nodes Date: Wed, 7 Oct 2026 10:26:43 +0300 Message-Id: <20261007072645.1618147-5-tmaimon77@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20261007072645.1618147-1-tmaimon77@gmail.com> References: <20261007072645.1618147-1-tmaimon77@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Extend the NPCM845 SoC DTSI with the peripheral controller nodes needed by the evaluation board and downstream platforms. Add the Ethernet MACs, USB device controllers and PHY, MMC controller, FIU controllers, memory controller, RNG, ADC, PWM/FAN controller, PSPI, and I2C buses. Also add the OP-TEE firmware node needed to describe these blocks. Signed-off-by: Tomer Maimon --- .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 686 ++++++++++++++++++ .../boot/dts/nuvoton/nuvoton-npcm845.dtsi | 6 + 2 files changed, 692 insertions(+) diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi index 542f27e..9b7a99a 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi @@ -4,6 +4,7 @@ #include #include #include +#include / { #address-cells = <2>; @@ -30,6 +31,11 @@ }; }; + udc0_phy: usb-phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; + ahb { #address-cells = <2>; #size-cells = <2>; @@ -51,6 +57,252 @@ reg = <0x0 0xf0800000 0x0 0x1000>; }; + gmac1: ethernet@f0804000 { + device_type = "network"; + compatible = "snps,dwmac-3.72a", "snps,dwmac"; + reg = <0x0 0xf0804000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&rg2_pins + &rg2mdio_pins>; + status = "disabled"; + }; + + gmac2: ethernet@f0806000 { + device_type = "network"; + compatible = "snps,dwmac-3.72a", "snps,dwmac"; + reg = <0x0 0xf0806000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&r1_pins + &r1err_pins + &r1md_pins>; + status = "disabled"; + }; + + gmac3: ethernet@f0808000 { + device_type = "network"; + compatible = "snps,dwmac-3.72a", "snps,dwmac"; + reg = <0x0 0xf0808000 0x0 0x2000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&clk NPCM8XX_CLK_AHB>; + clock-names = "stmmaceth"; + pinctrl-names = "default"; + pinctrl-0 = <&r2_pins + &r2err_pins + &r2md_pins>; + status = "disabled"; + }; + + mc: memory-controller@f0824000 { + compatible = "nuvoton,npcm845-memory-controller"; + reg = <0x0 0xf0824000 0x0 0x1000>; + interrupts = ; + }; + + udc0: usb@f0830000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0830000 0x0 0x1000 + 0x0 0xfffeb000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc1: usb@f0831000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0831000 0x0 0x1000 + 0x0 0xfffeb800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc2: usb@f0832000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0832000 0x0 0x1000 + 0x0 0xfffec000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc3: usb@f0833000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0833000 0x0 0x1000 + 0x0 0xfffec800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc4: usb@f0834000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0834000 0x0 0x1000 + 0x0 0xfffed000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc5: usb@f0835000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0835000 0x0 0x1000 + 0x0 0xfffed800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc6: usb@f0836000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0836000 0x0 0x1000 + 0x0 0xfffee000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc7: usb@f0837000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0837000 0x0 0x1000 + 0x0 0xfffee800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc8: usb@f0838000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0838000 0x0 0x1000 + 0x0 0xfffef000 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + udc9: usb@f0839000 { + compatible = "nuvoton,npcm845-udc", "nuvoton,npcm750-udc"; + reg = <0x0 0xf0839000 0x0 0x1000 + 0x0 0xfffef800 0x0 0x800>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_SU>; + clock-names = "clk_usb_bridge"; + + phys = <&udc0_phy>; + phy_type = "utmi_wide"; + dr_mode = "peripheral"; + status = "disabled"; + }; + + sdhci: mmc@f0842000 { + compatible = "nuvoton,npcm845-sdhci"; + reg = <0x0 0xf0842000 0x0 0x100>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_AHB>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc8_pins + &mmc_pins>; + status = "disabled"; + }; + + fiu0: spi@fb000000 { + compatible = "nuvoton,npcm845-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xfb000000 0x0 0x1000>; + reg-names = "control"; + clocks = <&clk NPCM8XX_CLK_SPI0>; + status = "disabled"; + }; + + fiu1: spi@fb002000 { + compatible = "nuvoton,npcm845-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xfb002000 0x0 0x1000>; + reg-names = "control"; + clocks = <&clk NPCM8XX_CLK_SPI1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "disabled"; + }; + + fiu3: spi@c0000000 { + compatible = "nuvoton,npcm845-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xc0000000 0x0 0x1000>; + reg-names = "control"; + clocks = <&clk NPCM8XX_CLK_SPI3>; + pinctrl-names = "default"; + pinctrl-0 = <&spi3_pins>; + status = "disabled"; + }; + + fiux: spi@fb001000 { + compatible = "nuvoton,npcm845-fiu"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0 0xfb001000 0x0 0x1000>, + <0x0 0xf8000000 0x0 0x2000000>; + reg-names = "control", "memory"; + clocks = <&clk NPCM8XX_CLK_SPIX>; + status = "disabled"; + }; + apb@f0000000 { #address-cells = <1>; #size-cells = <1>; @@ -152,6 +404,245 @@ clocks = <&refclk>; }; + rng: rng@b000 { + compatible = "nuvoton,npcm845-rng"; + reg = <0xb000 0x8>; + status = "disabled"; + }; + + adc: adc@c000 { + compatible = "nuvoton,npcm845-adc"; + reg = <0xC000 0x8>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_ADC>; + resets = <&rstc 0x20 27>; + status = "disabled"; + }; + + i2c0: i2c@80000 { + reg = <0x80000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb0_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c1: i2c@81000 { + reg = <0x81000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb1_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c2: i2c@82000 { + reg = <0x82000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb2_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c3: i2c@83000 { + reg = <0x83000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb3_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c4: i2c@84000 { + reg = <0x84000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb4_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c5: i2c@85000 { + reg = <0x85000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb5_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c6: i2c@86000 { + reg = <0x86000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb6_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c7: i2c@87000 { + reg = <0x87000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb7_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c8: i2c@88000 { + reg = <0x88000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb8_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c9: i2c@89000 { + reg = <0x89000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb9_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c10: i2c@8a000 { + reg = <0x8a000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb10_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c11: i2c@8b000 { + reg = <0x8b000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb11_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c12: i2c@8c000 { + reg = <0x8c000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb12_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c13: i2c@8d000 { + reg = <0x8d000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb13_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c14: i2c@8e000 { + reg = <0x8e000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb14_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c15: i2c@8f000 { + reg = <0x8f000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb15_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + peci: peci-controller@100000 { compatible = "nuvoton,npcm845-peci"; reg = <0x100000 0x1000>; @@ -161,6 +652,53 @@ status = "disabled"; }; + pwm_fan:pwm-fan-controller@103000 { + compatible = "nuvoton,npcm845-pwm-fan"; + reg = <0x103000 0x3000>, + <0x180000 0x8000>; + reg-names = "pwm", "fan"; + clocks = <&clk NPCM8XX_CLK_APB3>, + <&clk NPCM8XX_CLK_APB4>; + clock-names = "pwm","fan"; + interrupts = , + , + , + , + , + , + , + ; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins &pwm1_pins + &pwm2_pins &pwm3_pins + &pwm4_pins &pwm5_pins + &pwm6_pins &pwm7_pins + &pwm8_pins &pwm9_pins + &pwm10_pins &pwm11_pins + &fanin0_pins &fanin1_pins + &fanin2_pins &fanin3_pins + &fanin4_pins &fanin5_pins + &fanin6_pins &fanin7_pins + &fanin8_pins &fanin9_pins + &fanin10_pins &fanin11_pins + &fanin12_pins &fanin13_pins + &fanin14_pins &fanin15_pins>; + status = "disabled"; + }; + + pspi: spi@201000 { + compatible = "nuvoton,npcm845-pspi"; + reg = <0x201000 0x1000>; + pinctrl-names = "default"; + pinctrl-0 = <&pspi_pins>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&clk NPCM8XX_CLK_APB5>; + clock-names = "clk_apb5"; + resets = <&rstc 0x24 23>; + status = "disabled"; + }; }; apb@fff00000 { @@ -169,6 +707,154 @@ compatible = "simple-bus"; interrupt-parent = <&gic>; ranges = <0xfff00000 0x0 0xfff00000 0x00016000>; + + i2c16: i2c@0 { + reg = <0x0 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb16_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c17: i2c@1000 { + reg = <0x1000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb17_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c18: i2c@2000 { + reg = <0x2000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb18_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c19: i2c@3000 { + reg = <0x3000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb19_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c20: i2c@4000 { + reg = <0x4000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb20_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c21: i2c@5000 { + reg = <0x5000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb21_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c22: i2c@6000 { + reg = <0x6000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb22_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c23: i2c@7000 { + reg = <0x7000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&smb23_pins>; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c24: i2c@8000 { + reg = <0x8000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c25: i2c@9000 { + reg = <0x9000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; + + i2c26: i2c@a000 { + reg = <0xa000 0x1000>; + compatible = "nuvoton,npcm845-i2c"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk NPCM8XX_CLK_APB2>; + clock-frequency = <100000>; + interrupts = ; + nuvoton,sys-mgr = <&gcr>; + status = "disabled"; + }; }; }; diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi index dc5a0e1..0be38b0 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi @@ -76,4 +76,10 @@ ; }; + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; }; -- 2.34.1