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[199.106.103.52]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-16166121f2asm14522277c88.4.2026.10.08.01.10.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Oct 2026 01:11:02 -0700 (PDT) From: Shawn Guo To: Bjorn Andersson Cc: Abel Vesa , Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio , Taniya Das , Jagadeesh Kona , Bryan O'Donoghue , Bartosz Golaszewski , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Shawn Guo Subject: [PATCH v2 2/4] arm64: dts: qcom: glymur: Add videocc sleep clock Date: Thu, 8 Oct 2026 16:10:34 +0800 Message-ID: <20261008081036.3492003-3-shengchao.guo@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261008081036.3492003-1-shengchao.guo@oss.qualcomm.com> References: <20261008081036.3492003-1-shengchao.guo@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=J4s/fwnS c=1 sm=1 tr=0 ts=6ac75018 cx=c_pps a=kVLUcbK0zfr7ocalXnG1qA==:117 a=b9+bayejhc3NMeqCNyeLQQ==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=kYVbGFCUSVokFan4DuAA:9 a=vr4QvYf-bLy2KjpDp97w:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA4MDAzMiBTYWx0ZWRfX11xVTHF3h6FZ Gvzys7kNCu829VXRcg491UKyNkiGPQAX3onGnMPg2po5T379fYIGgnW5o+66kIxTRbOfKQiSXk8 i6xbsCYQ/iMEdAVeC0wQ5nXra2j7Jh0= X-Proofpoint-GUID: of2MZ-CH3dVqku5p8iewwtVlqnoMF1va X-Proofpoint-ORIG-GUID: of2MZ-CH3dVqku5p8iewwtVlqnoMF1va X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA4MDAzMiBTYWx0ZWRfXy30i7V5I3TcO pHx/pzz9s3gFvWZnSDTmJIIQJ+9oIW/Pt/+SdwHl6qRI4SUQquCTb6uO9mBcr0O2TfDh1WgLfjR WQEqS7kFEoaxFYy1daEqskovzfw42Xg/myyBtG6wvHTPJ4UY/Lxl5r+Tt63BNRr+iXEeIobKa6o yG5yO1UVgxqGJGt/JrKDX7OvmX00/hL1x9oIj+zqmbhMwXYdzsNizILc3iz8JDg217gDAmnJATz zHgjrym8axmeHvSMm7zoBdNLwyGR4UF/ld3W+Tra/u+hZTQu0Rdpi62vyUugWKcNpLnRzH87S9M nHFFNSyp2a2v5zbvcpI2GgNTbvsgd7kYh4VJO+SiUA2SVOQSUSpjQPNMlT/pjffs9PcTn9UFaoz /dppa3SDGTMBtNrgoF+mVU5g/FEv5FTszpVLVMmQIOa0WWPkhtSkHmVcNmpsjKpO3ftkYhSu/yo a4FzUC0NwiQ69JjDHVg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-08_03,2026-10-06_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 phishscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610020000 definitions=main-2610080032 The video clock controller binding describes three clock inputs for Glymur: the board XO, the always-on board XO and the 32 kHz sleep clock. The videocc node passes only the first two. Pass the board sleep clock as the third input. No functional change, the video sleep clock keeps the rate left by the bootloader and has no rate consumer. Assisted-by: LLM Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/qcom/glymur.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi index 65a398c0a992..b389f953f97f 100644 --- a/arch/arm64/boot/dts/qcom/glymur.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi @@ -5810,7 +5810,8 @@ videocc: clock-controller@aaf0000 { compatible = "qcom,glymur-videocc"; reg = <0x0 0x0aaf0000 0x0 0x10000>; clocks = <&rpmhcc RPMH_CXO_CLK>, - <&rpmhcc RPMH_CXO_CLK_A>; + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>; power-domains = <&rpmhpd RPMHPD_MMCX>, <&rpmhpd RPMHPD_MXC>; -- 2.43.0