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From: Joshua Yeong <joshua.yeong@starfivetech.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	rafael@kernel.org, viresh.kumar@linaro.org, ulfh@kernel.org,
	rahul@summations.net, anup@brainfault.org, lftan.linux@gmail.com
Cc: alex@ghiti.fr, joshua.yeong@starfivetech.com,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v2 2/7] dt-bindings: dvfs: Add RPMI performance service bindings
Date: Thu,  8 Oct 2026 17:10:26 +0800	[thread overview]
Message-ID: <20261008091032.2832333-3-joshua.yeong@starfivetech.com> (raw)
In-Reply-To: <20261008091032.2832333-1-joshua.yeong@starfivetech.com>

Add device tree bindings for the RPMI performance service group based
controller for the supervisor software.

A CPU names its performance domain through "performance-domains". Any
other device names it through "power-domains": the controller is also a
power domain provider, with one power domain per performance domain and
the levels the domain advertises as the performance states of that
power domain.

The RPMI performance service group is defined by the RISC-V Platform
Management Interface (RPMI) specification.

Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com>
---
 .../bindings/dvfs/riscv,rpmi-performance.yaml | 88 +++++++++++++++++++
 1 file changed, 88 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/dvfs/riscv,rpmi-performance.yaml

diff --git a/Documentation/devicetree/bindings/dvfs/riscv,rpmi-performance.yaml b/Documentation/devicetree/bindings/dvfs/riscv,rpmi-performance.yaml
new file mode 100644
index 000000000000..ec7856cb7257
--- /dev/null
+++ b/Documentation/devicetree/bindings/dvfs/riscv,rpmi-performance.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dvfs/riscv,rpmi-performance.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: RISC-V RPMI performance service group
+
+maintainers:
+  - Joshua Yeong <joshua.yeong@starfivetech.com>
+
+description: |
+  The RISC-V Platform Management Interface (RPMI) [1] defines a modular and
+  extensible messaging protocol for platform management functions. The supervisor
+  software can send and receive RPMI messages via SBI MPXY extension [2]
+  or via a dedicated supervisor-mode RPMI transport.
+
+  The RPMI specification [1] defines performance service group (performance
+  domain) for accessing and controlling platform-managed performance-related
+  resources, as implemented by a platform microcontroller. Supervisor software
+  can interact with the RPMI performance service group through an SBI MPXY
+  channel or through a dedicated supervisor-mode RPMI transport.
+
+  The node is a performance domain provider. A CPU references its domain
+  through the generic "performance-domains" property described in
+  dvfs/performance-domain.yaml.
+
+  The node can also be a power domain provider, with one power domain for each
+  performance domain. Any other device that runs in one of the domains
+  references it through "power-domains", and each level the domain advertises
+  is a performance state of that power domain.
+
+  For example, with the provider labelled "performance", a CPU that runs in
+  domain 0 and a device that runs in domain 1 reference their domains as:
+
+    cpu@0 {
+        ...
+        performance-domains = <&performance 0>;
+    };
+
+    gpu@40000000 {
+        ...
+        power-domains = <&performance 1>;
+    };
+
+  ===========================================
+  References
+  ===========================================
+
+  [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher)
+      https://github.com/riscv-non-isa/riscv-rpmi/releases
+
+  [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher)
+      https://github.com/riscv-non-isa/riscv-sbi-doc/releases
+
+properties:
+  compatible:
+    description:
+      Intended for use by the supervisor software.
+    const: riscv,rpmi-performance
+
+  mboxes:
+    maxItems: 1
+    description:
+      Mailbox channel of the underlying RPMI transport or SBI message proxy channel.
+
+  "#performance-domain-cells":
+    const: 1
+
+  "#power-domain-cells":
+    const: 1
+
+required:
+  - compatible
+  - mboxes
+  - "#performance-domain-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    rpmi-performance {
+        compatible = "riscv,rpmi-performance";
+        mboxes = <&mpxy_mbox 0x1003 0x0>;
+        #performance-domain-cells = <0x01>;
+        #power-domain-cells = <0x01>;
+    };
+...
-- 
2.43.0


  parent reply	other threads:[~2026-10-08  9:12 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-08  9:10 [PATCH v2 0/7] Add RISC-V RPMI performance service support Joshua Yeong
2026-10-08  9:10 ` [PATCH v2 1/7] dt-bindings: dvfs: Add RPMI performance service message proxy bindings Joshua Yeong
2026-10-08  9:10 ` Joshua Yeong [this message]
2026-10-08 10:41   ` [PATCH v2 2/7] dt-bindings: dvfs: Add RPMI performance service bindings Conor Dooley
2026-10-08  9:10 ` [PATCH v2 3/7] dt-bindings: riscv: cpus: document performance-domains property Joshua Yeong
2026-10-08  9:10 ` [PATCH v2 4/7] firmware: riscv: Add RPMI performance service Joshua Yeong
2026-10-08  9:10 ` [PATCH v2 5/7] cpufreq: Add RISC-V RPMI cpufreq driver Joshua Yeong
2026-10-08  9:10 ` [PATCH v2 6/7] pmdomain: riscv: Add RPMI performance domains as power domains Joshua Yeong
2026-10-08  9:10 ` [PATCH v2 7/7] MAINTAINERS: Add RISC-V RPMI performance driver Joshua Yeong

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