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Thu, 8 Oct 2026 12:33:51 +0000 From: Changhuang Liang To: Brian Masney , Jerome Brunet , Stephen Boyd , Philipp Zabel , Emil Renner Berthing Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Hal Feng , Changhuang Liang Subject: [PATCH v6 02/15] clk: starfive: jh71x0: Move reset controller registration to jh71x0 common code Date: Thu, 8 Oct 2026 05:33:25 -0700 Message-Id: <20261008123338.11081-3-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20261008123338.11081-1-changhuang.liang@starfivetech.com> References: <20261008123338.11081-1-changhuang.liang@starfivetech.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SHXPR01CA0017.CHNPR01.prod.partner.outlook.cn (2406:e500:c311:1b::26) To ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:17::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZQ4PR01MB1202:EE_|ZQ4PR01MB1268:EE_ X-MS-Office365-Filtering-Correlation-Id: 22e2b916-7ca9-4aa5-6a5c-08df25386865 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|52116014|7416014|1800799024|23010399003|366016|18002099003|22082099003|10067099003|56012099006|38350700014; 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Its logic is generic: allocate a struct jh71x0_reset_adev, point it at the CRG register base and add it as an auxiliary device for the reset driver to bind to. Move it to clk-starfive-jh71x0.c as jh71x0_reset_controller_register() so that the clock drivers of other StarFive SoCs can reuse it, and make CLK_STARFIVE_JH71X0 select AUXILIARY_BUS accordingly. The auxiliary device ID is dropped: every CRG already uses a distinct auxiliary device name, so the ID is not needed to keep the device names unique, and it is always 0 now. Signed-off-by: Changhuang Liang --- drivers/clk/starfive/Kconfig | 2 +- .../clk/starfive/clk-starfive-jh7110-aon.c | 2 +- .../clk/starfive/clk-starfive-jh7110-isp.c | 2 +- .../clk/starfive/clk-starfive-jh7110-stg.c | 2 +- .../clk/starfive/clk-starfive-jh7110-sys.c | 59 +------------------ .../clk/starfive/clk-starfive-jh7110-vout.c | 2 +- drivers/clk/starfive/clk-starfive-jh7110.h | 4 -- drivers/clk/starfive/clk-starfive-jh71x0.c | 54 +++++++++++++++++ drivers/clk/starfive/clk-starfive-jh71x0.h | 2 + 9 files changed, 62 insertions(+), 67 deletions(-) diff --git a/drivers/clk/starfive/Kconfig b/drivers/clk/starfive/Kconfig index bd29358ffeec..51716655554f 100644 --- a/drivers/clk/starfive/Kconfig +++ b/drivers/clk/starfive/Kconfig @@ -2,6 +2,7 @@ config CLK_STARFIVE_JH71X0 bool + select AUXILIARY_BUS config CLK_STARFIVE_JH7100 bool "StarFive JH7100 clock support" @@ -32,7 +33,6 @@ config CLK_STARFIVE_JH7110_PLL config CLK_STARFIVE_JH7110_SYS bool "StarFive JH7110 system clock support" depends on ARCH_STARFIVE || COMPILE_TEST - select AUXILIARY_BUS select CLK_STARFIVE_JH71X0 select RESET_STARFIVE_JH7110 if RESET_CONTROLLER select CLK_STARFIVE_JH7110_PLL diff --git a/drivers/clk/starfive/clk-starfive-jh7110-aon.c b/drivers/clk/starfive/clk-starfive-jh7110-aon.c index 6f67587f4335..66f1c56a7169 100644 --- a/drivers/clk/starfive/clk-starfive-jh7110-aon.c +++ b/drivers/clk/starfive/clk-starfive-jh7110-aon.c @@ -121,7 +121,7 @@ static int jh7110_aoncrg_probe(struct platform_device *pdev) if (ret) return ret; - return jh7110_reset_controller_register(priv, "rst-aon", 1); + return jh71x0_reset_controller_register(priv, "rst-aon"); } static const struct of_device_id jh7110_aoncrg_match[] = { diff --git a/drivers/clk/starfive/clk-starfive-jh7110-isp.c b/drivers/clk/starfive/clk-starfive-jh7110-isp.c index c02c8b29a123..f8222d3c81ee 100644 --- a/drivers/clk/starfive/clk-starfive-jh7110-isp.c +++ b/drivers/clk/starfive/clk-starfive-jh7110-isp.c @@ -180,7 +180,7 @@ static int jh7110_ispcrg_probe(struct platform_device *pdev) if (ret) goto err_exit; - ret = jh7110_reset_controller_register(priv, "rst-isp", 3); + ret = jh71x0_reset_controller_register(priv, "rst-isp"); if (ret) goto err_exit; diff --git a/drivers/clk/starfive/clk-starfive-jh7110-stg.c b/drivers/clk/starfive/clk-starfive-jh7110-stg.c index 2a5ad0e07d1d..5ae63e18aa4f 100644 --- a/drivers/clk/starfive/clk-starfive-jh7110-stg.c +++ b/drivers/clk/starfive/clk-starfive-jh7110-stg.c @@ -139,7 +139,7 @@ static int jh7110_stgcrg_probe(struct platform_device *pdev) if (ret) return ret; - return jh7110_reset_controller_register(priv, "rst-stg", 2); + return jh71x0_reset_controller_register(priv, "rst-stg"); } static const struct of_device_id jh7110_stgcrg_match[] = { diff --git a/drivers/clk/starfive/clk-starfive-jh7110-sys.c b/drivers/clk/starfive/clk-starfive-jh7110-sys.c index 1d460a03f936..6c5e9c54dfcd 100644 --- a/drivers/clk/starfive/clk-starfive-jh7110-sys.c +++ b/drivers/clk/starfive/clk-starfive-jh7110-sys.c @@ -6,15 +6,11 @@ * Copyright (C) 2022 StarFive Technology Co., Ltd. */ -#include #include #include #include #include #include -#include - -#include #include @@ -323,59 +319,6 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { JH7110_SYSCLK_OSC), }; -static void jh7110_reset_unregister_adev(void *_adev) -{ - struct auxiliary_device *adev = _adev; - - auxiliary_device_delete(adev); - auxiliary_device_uninit(adev); -} - -static void jh7110_reset_adev_release(struct device *dev) -{ - struct auxiliary_device *adev = to_auxiliary_dev(dev); - struct jh71x0_reset_adev *rdev = to_jh71x0_reset_adev(adev); - - kfree(rdev); -} - -int jh7110_reset_controller_register(struct jh71x0_clk_priv *priv, - const char *adev_name, - u32 adev_id) -{ - struct jh71x0_reset_adev *rdev; - struct auxiliary_device *adev; - int ret; - - rdev = kzalloc_obj(*rdev); - if (!rdev) - return -ENOMEM; - - rdev->base = priv->base; - - adev = &rdev->adev; - adev->name = adev_name; - adev->dev.parent = priv->dev; - adev->dev.release = jh7110_reset_adev_release; - adev->id = adev_id; - - ret = auxiliary_device_init(adev); - if (ret) { - kfree(rdev); - return ret; - } - - ret = auxiliary_device_add(adev); - if (ret) { - auxiliary_device_uninit(adev); - return ret; - } - - return devm_add_action_or_reset(priv->dev, - jh7110_reset_unregister_adev, adev); -} -EXPORT_SYMBOL_GPL(jh7110_reset_controller_register); - /* * This clock notifier is called when the rate of PLL0 clock is to be changed. * The cpu_root clock should save the current parent clock and switch its parent @@ -525,7 +468,7 @@ static int __init jh7110_syscrg_probe(struct platform_device *pdev) if (ret) return ret; - return jh7110_reset_controller_register(priv, "rst-sys", 0); + return jh71x0_reset_controller_register(priv, "rst-sys"); } static const struct of_device_id jh7110_syscrg_match[] = { diff --git a/drivers/clk/starfive/clk-starfive-jh7110-vout.c b/drivers/clk/starfive/clk-starfive-jh7110-vout.c index aeba42cd3c44..14e5b8286671 100644 --- a/drivers/clk/starfive/clk-starfive-jh7110-vout.c +++ b/drivers/clk/starfive/clk-starfive-jh7110-vout.c @@ -189,7 +189,7 @@ static int jh7110_voutcrg_probe(struct platform_device *pdev) if (ret) goto err_exit; - ret = jh7110_reset_controller_register(priv, "rst-vo", 4); + ret = jh71x0_reset_controller_register(priv, "rst-vo"); if (ret) goto err_exit; diff --git a/drivers/clk/starfive/clk-starfive-jh7110.h b/drivers/clk/starfive/clk-starfive-jh7110.h index 0659adae4d76..55374ee24d4d 100644 --- a/drivers/clk/starfive/clk-starfive-jh7110.h +++ b/drivers/clk/starfive/clk-starfive-jh7110.h @@ -10,8 +10,4 @@ struct jh7110_top_sysclk { int top_clks_num; }; -int jh7110_reset_controller_register(struct jh71x0_clk_priv *priv, - const char *adev_name, - u32 adev_id); - #endif diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.c b/drivers/clk/starfive/clk-starfive-jh71x0.c index 80e9157347eb..2cc71f49ddee 100644 --- a/drivers/clk/starfive/clk-starfive-jh71x0.c +++ b/drivers/clk/starfive/clk-starfive-jh71x0.c @@ -5,10 +5,13 @@ * Copyright (C) 2021-2022 Emil Renner Berthing */ +#include #include #include #include #include +#include +#include #include "clk-starfive-jh71x0.h" @@ -337,3 +340,54 @@ struct clk_hw *jh71x0_clk_get(struct of_phandle_args *clkspec, void *data) return ERR_PTR(-EINVAL); } EXPORT_SYMBOL_GPL(jh71x0_clk_get); + +static void jh71x0_reset_unregister_adev(void *_adev) +{ + struct auxiliary_device *adev = _adev; + + auxiliary_device_delete(adev); + auxiliary_device_uninit(adev); +} + +static void jh71x0_reset_adev_release(struct device *dev) +{ + struct auxiliary_device *adev = to_auxiliary_dev(dev); + struct jh71x0_reset_adev *rdev = to_jh71x0_reset_adev(adev); + + kfree(rdev); +} + +int jh71x0_reset_controller_register(struct jh71x0_clk_priv *priv, + const char *adev_name) +{ + struct jh71x0_reset_adev *rdev; + struct auxiliary_device *adev; + int ret; + + rdev = kzalloc_obj(*rdev); + if (!rdev) + return -ENOMEM; + + rdev->base = priv->base; + + adev = &rdev->adev; + adev->name = adev_name; + adev->dev.parent = priv->dev; + adev->dev.release = jh71x0_reset_adev_release; + + ret = auxiliary_device_init(adev); + if (ret) { + kfree(rdev); + return ret; + } + + ret = auxiliary_device_add(adev); + if (ret) { + auxiliary_device_uninit(adev); + return ret; + } + + return devm_add_action_or_reset(priv->dev, + jh71x0_reset_unregister_adev, adev); +} +EXPORT_SYMBOL_GPL(jh71x0_reset_controller_register); diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.h b/drivers/clk/starfive/clk-starfive-jh71x0.h index 9d5dec1d5cd1..322a05157faf 100644 --- a/drivers/clk/starfive/clk-starfive-jh71x0.h +++ b/drivers/clk/starfive/clk-starfive-jh71x0.h @@ -123,5 +123,7 @@ struct jh71x0_clk_priv { const struct clk_ops *starfive_jh71x0_clk_ops(u32 max); struct clk_hw *jh71x0_clk_get(struct of_phandle_args *clkspec, void *data); +int jh71x0_reset_controller_register(struct jh71x0_clk_priv *priv, + const char *adev_name); #endif -- 2.25.1