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Thu, 8 Oct 2026 12:33:57 +0000 From: Changhuang Liang To: Brian Masney , Jerome Brunet , Stephen Boyd , Philipp Zabel , Emil Renner Berthing Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Hal Feng , Changhuang Liang Subject: [PATCH v6 08/15] clk: starfive: Introduce idiv ops for inverted divider clocks Date: Thu, 8 Oct 2026 05:33:31 -0700 Message-Id: <20261008123338.11081-9-changhuang.liang@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20261008123338.11081-1-changhuang.liang@starfivetech.com> References: <20261008123338.11081-1-changhuang.liang@starfivetech.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SHXPR01CA0017.CHNPR01.prod.partner.outlook.cn (2406:e500:c311:1b::26) To ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:17::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZQ4PR01MB1202:EE_|ZQ4PR01MB1268:EE_ X-MS-Office365-Filtering-Correlation-Id: 5429f9a1-3720-407a-6cef-08df25386c5f X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|52116014|7416014|1800799024|23010399003|366016|6133799003|18002099003|22082099003|10067099003|56012099006|38350700014; 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Add the JH71X0_IDIV() macro to declare such clocks, and jh71x0_clk_idiv_ops, which combines the divider rate operations with get_phase/set_phase. Signed-off-by: Changhuang Liang --- drivers/clk/starfive/clk-starfive-jh71x0.c | 13 ++++++++++++- drivers/clk/starfive/clk-starfive-jh71x0.h | 8 ++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.c b/drivers/clk/starfive/clk-starfive-jh71x0.c index c5ee82db3c92..224fcc3d08db 100644 --- a/drivers/clk/starfive/clk-starfive-jh71x0.c +++ b/drivers/clk/starfive/clk-starfive-jh71x0.c @@ -303,6 +303,15 @@ static const struct clk_ops jh71x0_clk_inv_ops = { .debug_init = jh71x0_clk_debug_init, }; +static const struct clk_ops jh71x0_clk_idiv_ops = { + .get_phase = jh71x0_clk_get_phase, + .set_phase = jh71x0_clk_set_phase, + .recalc_rate = jh71x0_clk_recalc_rate, + .determine_rate = jh71x0_clk_determine_rate, + .set_rate = jh71x0_clk_set_rate, + .debug_init = jh71x0_clk_debug_init, +}; + const struct clk_ops *starfive_jh71x0_clk_ops(u32 max) { if (max & JH71X0_CLK_DIV_MASK) { @@ -313,7 +322,9 @@ const struct clk_ops *starfive_jh71x0_clk_ops(u32 max) } if (max & JH71X0_CLK_ENABLE) return &jh71x0_clk_gdiv_ops; - if (max == JH71X0_CLK_FRAC_MAX) + else if (max & JH71X0_CLK_INVERT) + return &jh71x0_clk_idiv_ops; + else if (max == JH71X0_CLK_FRAC_MAX) return &jh71x0_clk_fdiv_ops; return &jh71x0_clk_div_ops; } diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.h b/drivers/clk/starfive/clk-starfive-jh71x0.h index 2a1f0fb4cbb1..4cb3c2ef9525 100644 --- a/drivers/clk/starfive/clk-starfive-jh71x0.h +++ b/drivers/clk/starfive/clk-starfive-jh71x0.h @@ -104,6 +104,14 @@ struct jh71x0_clk_data { .parents = { [0] = _parent }, \ } +#define JH71X0_IDIV(_idx, _name, _flags, _max, _parent) \ +[_idx] = { \ + .name = _name, \ + .flags = _flags, \ + .max = JH71X0_CLK_INVERT | (_max), \ + .parents = { [0] = _parent }, \ +} + struct jh71x0_clk { struct clk_hw hw; unsigned int idx; -- 2.25.1