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Thu, 08 Oct 2026 06:10:17 -0700 (PDT) From: HyeongJun An To: Mark Brown Cc: Liam Girdwood , linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, HyeongJun An , Shenghao Ding , Kevin Lu , Baojun Xu , Sen Wang , Jaroslav Kysela , Takashi Iwai Subject: [PATCH 3/6] ASoC: pcm3168a: Fix the DAC zero flag polarity bit Date: Thu, 8 Oct 2026 22:09:49 +0900 Message-ID: <20261008130953.2446692-4-sammiee5311@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261008130953.2446692-1-sammiee5311@gmail.com> References: <20261008130953.2446692-1-sammiee5311@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The DAC Zero Flag Polarity enum uses PCM3168A_DAC_ATSPDA_SHIFT, which is bit 6 of register 70. That bit is ATSPDA, the attenuation speed, which the DAC Volume Rate Multiplier enum already owns. The datasheet puts ZREV, the zero flag polarity, at bit 0. The header defines PCM3168A_DAC_ZREV_SHIFT for it, but nothing uses it. So changing the zero flag polarity changes the attenuation speed, and ZREV cannot be set. Use PCM3168A_DAC_ZREV_SHIFT. Fixes: a9b17a638af5 ("ASoC: pcm3168a: Add driver for pcm3168a codec") Link: https://www.ti.com/lit/ds/symlink/pcm3168a.pdf Assisted-by: Claude:claude-opus-5-5 Signed-off-by: HyeongJun An --- sound/soc/codecs/pcm3168a.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/codecs/pcm3168a.c b/sound/soc/codecs/pcm3168a.c index cb6a6f08f2f8..6f45ea4869a7 100644 --- a/sound/soc/codecs/pcm3168a.c +++ b/sound/soc/codecs/pcm3168a.c @@ -103,7 +103,7 @@ static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_zf_func, PCM3168A_DAC_ATT_DEMP_ZF, static const char *const pcm3168a_pol[] = { "Active High", "Active Low" }; static SOC_ENUM_SINGLE_DECL(pcm3168a_dac_zf_pol, PCM3168A_DAC_ATT_DEMP_ZF, - PCM3168A_DAC_ATSPDA_SHIFT, pcm3168a_pol); + PCM3168A_DAC_ZREV_SHIFT, pcm3168a_pol); static const char *const pcm3168a_con[] = { "Differential", "Single-Ended" }; -- 2.43.0