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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-169a442956asm4151609c88.16.2026.10.08.21.50.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Oct 2026 21:50:05 -0700 (PDT) From: Varadarajan Narayanan Subject: [PATCH v6 0/6] Add support for USB phys in IPQ9650 Date: Fri, 09 Oct 2026 10:19:54 +0530 Message-Id: <20261009-phy-v6-0-50408e45bcc1@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAHJyyGoC/3XPTW7DIBAF4KtYrEs0DD+xs+o9qi4Aj2ukxk6MY yWKfPdinLRZ1BukQXzvDXcWaQgU2aG4s4GmEEPfpcG8Fcy3tvsiHuo0MwQ0UCLwU3vjxiiqNXn ACll6eRqoCdec8vG5zgOdLylsXC+Zs5G474/HMB6Kjq4jXwIFQMkW0IY49sMtbzGJLB6FKhdOg gNHva9NaSUKcO99jLvzxX4vmbt05JgJ/2gFYqWYqPeVrLGRTrhmg8oX+myViUJZ0t4R+MbaDap +afqQXqlK1IHySqAk7+QG1a/UrFQvCzuqpARrlKr+ofM8/wAH2NZGugEAAA== X-Change-ID: 20260820-phy-664ed5ec0292 To: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Manu Gautam , Stephen Boyd , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan , Krzysztof Kozlowski , Abel Vesa , Dmitry Baryshkov X-Mailer: b4 0.14.3 X-Authority-Analysis: v=2.4 cv=BfpNQbt2 c=1 sm=1 tr=0 ts=6ac8727f cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=tpprtx7nRKxrkFoMJnUA:9 a=QEXdDO2ut3YA:10 a=scEy_gLbYbu1JhEsrz4S:22 X-Proofpoint-ORIG-GUID: qDMSfqabJbyFidcD7eTK3f_Xtka6V06a X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDA5MDAxOSBTYWx0ZWRfX2RtgO0+tb/pt VAA/aVWI5mH7lUdTZ3iFLd0sjV1iHO7dBTdzsGkvutpjywtwwpcyJeFjfzZXVaO0mC4+cL5JBd0 dPsfGeXKuSSgWbSJJvAkjUD1CC7JIYT42T99l+x7vvRGRPJsjWbVRvyZGzpYUBtwfd16NzF7ZLL 5RrVaYIqMsykTng+mVNC1hP2WikjBr3WtPVwczqRAFyIKiKml7RxPNNKIksAF00SITf8RKWNvHT 6VswjIb63Tyef81soEQekLwW7GlTHnreG0QD2TpP5qLU/KL/rPqOClIRKYool5CYIswGfvgmqXZ 6RICAh7b5ZAe504gi+YhMdS5sG+gSv5OLFmgPw9TRJUqOYsdSiC/Y+vGFsks5WMs0JgtClaGAm7 WpC012GWA5bTHjEjU0NADnlfyvW4m+v7EaeoRGjYx3X+GCw1/VONTWOfYa52OGjlXxuoW6cAhMR p/AG2nGnCGIDeiKAS3g== X-Proofpoint-GUID: qDMSfqabJbyFidcD7eTK3f_Xtka6V06a X-Proofpoint-Spam-Info: AW1haW4tMjYxMDA5MDAxOSBTYWx0ZWRfX+WvWEhaTKqe8 OamEX4rwbb6vBDiKBoyJoj4waMP2L8G09GOXa/dWi8EaJ7aofBViy4c1QEUQ3E/ngOCQ9XutVBx 0HnKWTzQuJNzqEC1mjAa+1Eyrb8fQQQ= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-09_02,2026-10-08_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 adultscore=0 clxscore=1015 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610020000 definitions=main-2610090019 This series - Adds dt-bindings and driver changes for the high speed and super speed phys in IPQ9650. - IPQ9650 specific init tables to QMP super speed phy driver. - The Femto high speed phy driver is refactored to accomodate differences in the init sequences between SoCs first and then support for IPQ9650 is included. Signed-off-by: Varadarajan Narayanan --- Changes in v6: - #include in drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c to avoid build breaks in other (non arm64) architectures - Link to v5: https://lore.kernel.org/r/20261006-phy-v5-0-cbe9330a6449@oss.qualcomm.com Changes in v5: - Use FIELD_PREP_CONST to define FSEL_24MHZ - Change commit subject to 'Fix order of arguments to qcom_snps_hsphy_write_mask' - Use data->{pre,post}_tuning in qcom_snps_hsphy_init() instead of a temporary local variable - Pick R-b from Dmitry for two patches - Link to v4: https://lore.kernel.org/r/20261005-phy-v4-0-b04c4123ecb3@oss.qualcomm.com Changes in v4: - Rebase to top of tree - Split 4th patch 'phy: qcom: snps-femto-v2: Move PHY init registers to config tables' as follows: phy: qcom: snps-femto-v2: Fix qcom_snps_hsphy_write_mask argument mixup phy: qcom: snps-femto-v2: Move PHY init registers to config tables - Link to v3: https://lore.kernel.org/r/20260924-phy-v3-0-088e7be0cfaa@oss.qualcomm.com Changes in v3: - No code changes - Rebase to top of tree - Pick two R-b tags - Link to v2: https://lore.kernel.org/r/20260901-phy-v2-0-cc93d2f3b1bf@oss.qualcomm.com Changes in v2: - Pick one R-b from Krzysztof - Use qcom,ipq9650-usb-hs-phy directly instead of adding a 6nm compatible and falling back to it - Change pre/post to pre_tuning/post_tuning - Use array count instead of terminating entries - Fix value/mask mixup in 2 places - Link to v1: https://lore.kernel.org/r/20260824-phy-v1-0-257d68a3210b@oss.qualcomm.com --- Varadarajan Narayanan (6): dt-bindings: phy: qcom,qmp-usb: Add IPQ9650 USB3 PHY dt-bindings: phy: qcom,usb-snps-femto-v2: Add IPQ9650 compatible phy: qcom: qmp-usb: Add IPQ9650 USB3 PHY configuration phy: qcom: snps-femto-v2: Fix order of arguments to qcom_snps_hsphy_write_mask phy: qcom: snps-femto-v2: Move PHY init registers to config tables phy: qcom: snps-femto-v2: Add IPQ9650 support .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 2 + .../bindings/phy/qcom,usb-snps-femto-v2.yaml | 2 + drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 118 +++++++++++++ drivers/phy/qualcomm/phy-qcom-snps-femto-v2.c | 194 ++++++++++++++++----- 4 files changed, 269 insertions(+), 47 deletions(-) --- base-commit: ed06cc88c5e644da0f1ef397a836c7b1c10f41ac change-id: 20260820-phy-664ed5ec0292 Best regards, -- Varadarajan Narayanan