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[83.28.37.186]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48db9463a9dsm7627632f8f.6.2026.10.09.22.52.31 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 09 Oct 2026 22:52:32 -0700 (PDT) Date: Sat, 10 Oct 2026 07:52:21 +0200 From: Michal Pecio To: Jie Deng Cc: mathias.nyman@intel.com, gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] usb: xhci: Add XHCI_TT_SOFT_RETRY quirk for transaction errors on TT devices Message-ID: <20261010075221.409a5353.michal.pecio@gmail.com> In-Reply-To: <20261010032518.2040608-1-dengjie03@kylinos.cn> References: <20261010032518.2040608-1-dengjie03@kylinos.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Sat, 10 Oct 2026 11:25:18 +0800, Jie Deng wrote: > Low-speed devices behind a high-speed hub on some xHCI controllers stop > working after repeated lsusb -v: a transient USB transaction error on a > bulk/interrupt endpoint is followed by a hard reset recovery where every > command completes successfully (Reset EP with TSP=0 and Set TR Deq both > return COMP_SUCCESS), but the first new split transaction issued after > the restart fails again. After two such cycles the hub reports a port > connection change and the device drops off. There are no bulk/interrupt endopints. Which one? (I tried and lsusb -v does seem to trigger some interrupt transfers). The patch seems LLM-generated. Are you sure it's a HW problem and not an LLM problem? > The affected silicon does not honor the xHCI spec (4.6.8) requirement > that a Reset Endpoint command with TSP=0 "reset any USB2 split > transaction state associated with the endpoint": the stale split state > survives the reset, so the next split transaction carries the old > transaction's identity and can never match the hub TT state, cleared > or not. The soft reset path (TSP=1), which per the spec maintains the > split transaction state and retries the last transaction on the next > doorbell, recovers these transient errors on the first retry. > > Add a XHCI_TT_SOFT_RETRY quirk: when set, bulk/interrupt endpoints > behind a TT hub may use the existing soft retry machinery to retry a > USB Transaction Error (completion code 4) in place instead of going > through the hard reset path. Platforms without the quirk keep the > exact previous behavior. Isochronous and control endpoints never > enter this function, and the existing MAX_SOFT_RETRY bound still falls > back to the hard reset path for persistent errors. Sounds like you may need Configure Endpoint recovery if you ever run out of retries in any case other than disconnection. > The quirk is meant to be set by platform code for controllers with > this silicon bug; no in-tree platform code sets it yet. Is support for this HW coming upstream anytime soon? Not sure if we take fixes for out-of-tree issues. > On the affected controller every error reports comp code 4 (USB > Transaction Error), tt_info 0x301 and err_count 1, i.e. each in-place > retry succeeds immediately and the fallback is never taken. > > Signed-off-by: Jie Deng Suspecting missing Assisted-by. Regards, Michal