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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 8/8] dt-bindings: net: ethernet-controller: tabulate who adds the RGMII delays Date: Sat, 10 Oct 2026 11:59:00 +0100 Message-ID: <20261010105900.247342-9-tanure@linux.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261010105900.247342-1-tanure@linux.com> References: <20261010105900.247342-1-tanure@linux.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The informative section explains in prose how phy-mode, the delay properties in the MAC node and the mode handed to the PHY fit together, and says itself that developers often get this wrong. A reader has to work through several paragraphs before answering the one question they usually have: for this phy-mode and these properties, which part adds which delay. Add a table that answers it at a glance, with one row for every combination the properties allow. Assisted-by: LLM Signed-off-by: Lucas Tanure --- .../bindings/net/ethernet-controller.yaml | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index 1bafd687dcb1..bba27a9feb61 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -339,6 +339,24 @@ additionalProperties: true # has added. Failure to remove the delay will result in a # non-functioning link. # +# Put together, with the two properties in the MAC node, this is who +# adds each delay: +# +# phy-mode tx-internal-delay-ps rx-internal-delay-ps TX delay RX delay +# rgmii - - PCB trace PCB trace +# rgmii-id - - PHY PHY +# rgmii-id present - MAC PHY +# rgmii-id - present PHY MAC +# rgmii-id present present MAC MAC +# rgmii-txid - - PHY PCB trace +# rgmii-txid present - MAC PCB trace +# rgmii-rxid - - PCB trace PHY +# rgmii-rxid - present PCB trace MAC +# +# A property for a clock the PCB already delays is not in this table. +# It is either the fine tuning described next, or a mistake the MAC +# should report as a fatal error. +# # Sometimes there is a need to fine tune the delays. Often the MAC or # PHY can perform this fine tuning. In the MAC node, the Device Tree # properties 'rx-internal-delay-ps' and 'tx-internal-delay-ps' should -- 2.56.0