[PATCH v6 6/6] alpha: stop on fatal Tsunami system ECC and write parity errors

[Magnus Lindholm <linmag7@gmail.com>]

The 21272 HRM revision 4.0, section 8.8.1.1.2, describes uncorrectable
memory errors reported through PERROR<UECC>. Section 8.8.2.4 describes
PERROR<PERR>: incoming writes with bad parity can poison memory ECC and
have side effects on later writes; software is expected to crash.
PERR also covers parity errors reported by a PCI target on outgoing
writes. Treat either case conservatively as data integrity compromised.

After reporting and acknowledging a system error, panic for UECC or
PERR in either the saved frame or live Pchip snapshot. Saved errors must
not disappear merely because firmware already cleared the live register.
Limit this policy to system-error vectors: incidental PERROR state on a
CPU error or environmental vector must not trigger this new panic path.

This changes the old handler's policy and is kept separate so it can be
reviewed or reverted independently. Hardware UECC/PERR injection has not
been performed; validation of this policy uses synthetic handler tests.

Signed-off-by: Magnus Lindholm <linmag7@gmail.com>
---
 arch/alpha/kernel/err_tsunami.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/alpha/kernel/err_tsunami.c b/arch/alpha/kernel/err_tsunami.c
index 91937fd2d6e0..386304776805 100644
--- a/arch/alpha/kernel/err_tsunami.c
+++ b/arch/alpha/kernel/err_tsunami.c
@@ -19,6 +19,7 @@
 #include "pci_impl.h"
 
 #define TSUNAMI_PERROR_ERRMASK	0xdffUL
+#define TSUNAMI_PERROR_FATAL	(perror_m_uecc | perror_m_perr)
 #define TSUNAMI_PERROR_ECCMASK	(perror_m_uecc | perror_m_cre)
 #define TSUNAMI_PERROR_INV	(1UL << 51)
 #define TSUNAMI_MISC_NXM		(1UL << 28)
@@ -215,14 +216,22 @@ tsunami_machine_check(unsigned long vector, unsigned long la_ptr)
 	struct el_TSUNAMI_sysdata_mcheck *frame = NULL;
 	struct tsunami_error_state live;
 	char *saved_err_prefix = err_print_prefix;
+	u64 perror;
+	bool fatal = false;
 
 	/* Synchronize pending accesses before inspecting the chipset. */
 	mb();
 	mb();
 	draina();
 	tsunami_clear_errors(&live);
-	if (vector == SCB_Q_SYSMCHK || vector == SCB_Q_SYSERR)
+	if (vector == SCB_Q_SYSMCHK || vector == SCB_Q_SYSERR) {
 		frame = tsunami_system_frame(header);
+		perror = live.perror[0] | live.perror[1];
+		if (frame)
+			perror |= tsunami_pchip_error(frame, 0) |
+				  tsunami_pchip_error(frame, 1);
+		fatal = perror & TSUNAMI_PERROR_FATAL;
+	}
 
 	err_print_prefix = KERN_CRIT;
 	if (vector == SCB_Q_SYSMCHK || vector == SCB_Q_SYSERR) {
@@ -249,6 +258,8 @@ tsunami_machine_check(unsigned long vector, unsigned long la_ptr)
 		mb();
 	}
 
+	if (fatal)
+		panic("Tsunami: uncorrectable ECC or PCI write parity error");
 }
 
 static const char * const CLIPPER_EnvQW1SMIR[] = {
-- 
2.43.0