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Mon, 12 Oct 2026 05:55:04 -0700 (PDT) Received: from QCOM-eG0v1AUPpu.na.qualcomm.com ([2a01:e0a:830:450:d108:3895:812b:662a]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48db9acc936sm19187442f8f.44.2026.10.12.05.55.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Oct 2026 05:55:02 -0700 (PDT) From: Loic Poulain Date: Mon, 12 Oct 2026 14:54:56 +0200 Subject: [PATCH] i2c: qcom-cci: Fix HALT_ACK reset request being dropped Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261012-cci-fixes-v1-1-8cd4eb1fc5f9@oss.qualcomm.com> X-B4-Tracking: v=1; b=H4sIAKDYzGoC/x3KMQqAMAxA0auUzAbaiA5eRRxCTTVLlRZEKL27w fHxf4MqRaXC4hoUebTqlQ1hcBBPzoeg7mYgT3PwgTBGxaSvVOTEXiYamTiC/XeRP9i+br1/F5y BaVsAAAA= X-Change-ID: 20261012-cci-fixes-afa0e523a2ac To: Robert Foss , Andi Shyti , Vinod Koul , Wolfram Sang , Bjorn Andersson , Todor Tomov Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Loic Poulain X-Mailer: b4 0.14.2 X-Authority-Analysis: v=2.4 cv=QdzzLcbv c=1 sm=1 tr=0 ts=6accd8a9 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=fiHgs4EJ_qdzu2AaPLEA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDEyMDA1MSBTYWx0ZWRfX5JpFkmZ8fWLC IEk1W1xiAZVffOicIPBDYUlc88lVuO+rZ9uHBBmGroSyHZWQVdJCVEdcnFdeGU6ygyo28QO+Siw XTee5PPGwbDCgF8EU+0U08gHyfXdPj9aVSs0SQoWewUp+mhLunPR2sgEYN4w/8RlNwv99btMZYp jm7vuB8Tc0EyO2+pczloHu4vJHCwO7J96JCwtYDiqoh1oXrplx7aO7sMlpgRjVPXWCN4ERwmFhL vvC8a6Ll+1iD4cndvupqj8/Tg2rq/VCHVuvAZ6mriC/HvMNSRPzdjYd6OLi9CqU1VmfO7220YFT d9Cn3GuQBcupt5ZDEGg0i7SxdTT6l5hLijNv2nmw1l+vmiCjB84kD5Dg6SmLp0VwWUDFlStvmod v6B4cM9PlEjiQoSYyY5N4eDyC6GfoeER2lsRdRbXylcfCihjBPYMtdraL4x482fFPkUXKPhKH2l oHOoH5Tpgwa5vB9eSlQ== X-Proofpoint-ORIG-GUID: GmOqRORb24W5efPkdHqYhSRvCCk3eLMU X-Proofpoint-Spam-Info: AW1haW4tMjYxMDEyMDA1MSBTYWx0ZWRfX24pa6GYoIbnV aoC2IIflJTBL8Vzq62JtwVlkXu4IL4/UIp1GfDNZn5ZEp93t2PzvEsLZTGHKLdamEl/Hv5BTAwY YT1qfgWk3xl1BUb2ZVLPubXMd3N82vk= X-Proofpoint-GUID: GmOqRORb24W5efPkdHqYhSRvCCk3eLMU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-12_04,2026-10-09_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 phishscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610120051 A HALT_ACK interrupt indicates that the corresponding I2C master has entered the halted state and must be reset before further operation. The M0 and M1 HALT_ACK status bits may be asserted simultaneously in a single interrupt. However, the interrupt handler currently overwrites the reset mask when processing each HALT_ACK condition, causing the first reset request to be lost if both events are reported together. Accumulate reset requests instead of overwriting them so that both masters are properly reset when M0 and M1 HALT_ACK events occur in the same interrupt. Fixes: e517526195de4 ("i2c: Add Qualcomm CCI I2C driver") Signed-off-by: Loic Poulain --- drivers/i2c/busses/i2c-qcom-cci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c index 873e901a23d7a2874af5c1e738167247adff1910..bd70c6bae5dc685435bf2ad031cf7a11ec60ab4f 100644 --- a/drivers/i2c/busses/i2c-qcom-cci.c +++ b/drivers/i2c/busses/i2c-qcom-cci.c @@ -164,12 +164,12 @@ static irqreturn_t cci_isr(int irq, void *dev) } if (unlikely(val & CCI_IRQ_STATUS_0_I2C_M0_Q0Q1_HALT_ACK)) { - reset = CCI_RESET_CMD_M0_MASK; + reset |= CCI_RESET_CMD_M0_MASK; ret = IRQ_HANDLED; } if (unlikely(val & CCI_IRQ_STATUS_0_I2C_M1_Q0Q1_HALT_ACK)) { - reset = CCI_RESET_CMD_M1_MASK; + reset |= CCI_RESET_CMD_M1_MASK; ret = IRQ_HANDLED; } --- base-commit: ae8364085574203e7f4ea961921a1c7493bcb6de change-id: 20261012-cci-fixes-afa0e523a2ac Best regards, -- Loic Poulain