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Mon, 12 Oct 2026 08:05:26 +0000 X-MS-Exchange-Authentication-Results: mx.microsoft.com 1; spf=pass (sender IP is 222.71.101.198) smtp.mailfrom=cixtech.com; dkim=none (message not signed) header.d=none;dmarc=bestguesspass action=none header.from=cixtech.com; Received-SPF: Pass (protection.outlook.com: domain of cixtech.com designates 222.71.101.198 as permitted sender) receiver=protection.outlook.com; client-ip=222.71.101.198; helo=smtprelay.cixcomputing.com; pr=C Received: from smtprelay.cixcomputing.com (222.71.101.198) by SG2PEPF000B66CF.mail.protection.outlook.com (10.167.240.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.522.6 via Frontend Transport; Mon, 12 Oct 2026 08:05:26 +0000 Received: from localhost.localdomain (unknown [172.16.64.56]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id 12EBC427E3A2; Mon, 12 Oct 2026 16:05:18 +0800 (CST) From: Luo Liu To: vkoul@kernel.org, neil.armstrong@linaro.org, mani@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, gary.yang@cixtech.com, fugang.duan@cixtech.com, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: cix-kernel-upstream@cixtech.com, p.zabel@pengutronix.de, linux-kernel@vger.kernel.org, Luo.Liu@cixtech.com, Wuyi.Shen@cixtech.com, EastLake.Yang@cixtech.com Subject: [PATCH 0/3] phy: cix: Add Sky1 DisplayPort PHY support Date: Mon, 12 Oct 2026 16:05:14 +0800 Message-Id: <20261012080517.566920-1-Luo.Liu@cixtech.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG2PEPF000B66CF:EE_|OSNPR06MB8418:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 20b06dde-deee-4a86-4c04-08df283792fe X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|42112799006|23010399003|7416014|36860700016|1800799024|376014|6133799003|10067099003|18002099003|921020|261009223027099003|56012099006; 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The PHY exposes a PMA/CDB register interface and is controlled through the generic PHY DP configure ops (link rate, lane count, SSC and voltage swing). Patch 1 adds the binding and MAINTAINERS entry. Patch 2 adds the PHY driver. Patch 3 describes the SoC node and enables it on Radxa Orion O6. Luo Liu (3): dt-bindings: phy: Add CIX Sky1 DP PHY phy: cix: Add Sky1 DP PHY driver arm64: dts: cix: Add Sky1 DP PHY node .../bindings/phy/cix,sky1-dp-phy.yaml | 53 + MAINTAINERS | 8 + arch/arm64/boot/dts/cix/sky1-orion-o6.dts | 4 + arch/arm64/boot/dts/cix/sky1.dtsi | 8 + drivers/phy/Kconfig | 1 + drivers/phy/Makefile | 1 + drivers/phy/cix/Kconfig | 18 + drivers/phy/cix/Makefile | 2 + drivers/phy/cix/phy-cix-dp.c | 969 ++++++++++++++++++ 9 files changed, 1064 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/cix,sky1-dp-phy.yaml create mode 100644 drivers/phy/cix/Kconfig create mode 100644 drivers/phy/cix/Makefile create mode 100644 drivers/phy/cix/phy-cix-dp.c base-commit: cee9395acd8043be0644b25c34bfa86623f2b935 -- 2.25.1