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Mon, 12 Oct 2026 08:41:59 +0000 X-MS-Exchange-Authentication-Results: mx.microsoft.com 1; spf=pass (sender IP is 222.71.101.198) smtp.mailfrom=cixtech.com; dkim=none (message not signed) header.d=none;dmarc=bestguesspass action=none header.from=cixtech.com; Received-SPF: Pass (protection.outlook.com: domain of cixtech.com designates 222.71.101.198 as permitted sender) receiver=protection.outlook.com; client-ip=222.71.101.198; helo=smtprelay.cixcomputing.com; pr=C Received: from smtprelay.cixcomputing.com (222.71.101.198) by TY2PEPF0000AB86.mail.protection.outlook.com (10.167.253.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.522.6 via Frontend Transport; Mon, 12 Oct 2026 08:41:58 +0000 Received: from ubuntu (unknown [172.20.64.99]) by smtprelay.cixcomputing.com (Postfix) with ESMTPSA id C841C427E3B0; Mon, 12 Oct 2026 16:41:57 +0800 (CST) From: Jelly Jia To: vkoul@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, robin.murphy@arm.com Cc: devicetree@vger.kernel.org, Frank.Li@kernel.org, cix-kernel-upstream@cixtech.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jelly.Jia@cixtech.com Subject: [PATCH v3 4/6] dt-bindings: dma: arm,dma-350: Document the CIX Sky1 integration Date: Mon, 12 Oct 2026 16:41:53 +0800 Message-ID: <20261012084155.2547480-5-Jelly.Jia@cixtech.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261012084155.2547480-1-Jelly.Jia@cixtech.com> References: <20261012084155.2547480-1-Jelly.Jia@cixtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY2PEPF0000AB86:EE_|JH0PR06MB7149:EE_ Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: ef6750a1-f012-4c42-ceca-08df283cae04 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|7416014|23010399003|82310400026|36860700016|56012099006|261009223027099003|10067099003|22082099003|18002099003|6133799003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NaWz9WPe+wCLfN9fPEWUfa4oHwmI4a9GjWdirrgmbR1BxY7KFEbqEBDCq0unu7C+dszBZREyG7FuwWFwPVn8q9lLWLP2cnntvD0rncvoWLByU5HFJjEGqmF1IH1jEg642jzLkWib/UdrRFTZYPSZE4gwYqdaTKun9COg92s4mNTkSR/A+gliSPBuJQ3h20oZt/QazAmb5e0BBDd5kQ6kT0W9ALXQ+uebwh2G3bavyb8ZRUrmZHk2+IiHn1wlSujqYLbsqvVBCe665njiK/I98s/eJW7SVz3a5yOSY6SdD5s/GiCW+lMtaBfeHVHwt4Zrtpt0OKkKlYoYmfW+svQRiQAH+ahWu+RRa8k/3fgxBO2peXVwtcDcFNlnvrTO95KwcEu9LvWWaTuorf2fIq8PWW8Zm5PvlTQ9fbQi3g93D1MucYqgEOcz9009bwuaAS01 X-OriginatorOrg: cixtech.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Oct 2026 08:41:58.9970 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ef6750a1-f012-4c42-ceca-08df283cae04 X-MS-Exchange-CrossTenant-Id: 0409f77a-e53d-4d23-943e-ccade7cb4811 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=0409f77a-e53d-4d23-943e-ccade7cb4811;Ip=[222.71.101.198];Helo=[smtprelay.cixcomputing.com] X-MS-Exchange-CrossTenant-AuthSource: TY2PEPF0000AB86.apcprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: JH0PR06MB7149 The CIX Sky1 DMA-350 integration is the same device with SoC glue around it, so it is described by the arm,dma-350 node itself with an additional "cix,sky1-dma350" compatible rather than by a separate wrapper node. Extend the binding with the CIX compatible and the resources the integration needs: a clock, which the CIX variant requires, an optional reset, and an optional reserved memory region used when the controller cannot reach all of system memory. v2 -> v3: - Drop the cix,irq-router property and its conditional: the Sky1 interrupt gate it described is set up by the boot firmware and is not configured by Linux, so no property describes it. - The CIX compatible now requires a clock. Assisted-by: LLM checkpatch sparse dt_binding_check dtbs_check Signed-off-by: Jelly Jia --- .../devicetree/bindings/dma/arm,dma-350.yaml | 26 ++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml index 429f682f15d8..4e0f9ffb0039 100644 --- a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml @@ -11,10 +11,22 @@ maintainers: allOf: - $ref: dma-controller.yaml# + - if: + properties: + compatible: + contains: + const: cix,sky1-dma350 + then: + required: + - clocks properties: compatible: - const: arm,dma-350 + oneOf: + - const: arm,dma-350 + - items: + - const: cix,sky1-dma350 + - const: arm,dma-350 reg: items: @@ -36,6 +48,18 @@ properties: const: 1 description: The cell is the trigger input number + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + memory-region: + maxItems: 1 + description: + Reserved memory region used for DMA allocations when the controller + cannot reach all of system memory. + required: - compatible - reg -- 2.54.0