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[95.239.230.248]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48db94e33d2sm20899559f8f.9.2026.10.12.07.35.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Oct 2026 07:35:37 -0700 (PDT) From: Nicola Fiorillo To: Laurent Pinchart , Sakari Ailus Cc: Mauro Carvalho Chehab , Hans Verkuil , Dan Scally , Hans de Goede , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/7] media: ipu-bridge: Add the GC5035 binning link frequency Date: Mon, 12 Oct 2026 16:34:42 +0200 Message-ID: <20261012143443.34897-7-nicfio@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20261012143443.34897-1-nicfio@gmail.com> References: <20261009072733.39877-1-nicfio@gmail.com> <20261012143443.34897-1-nicfio@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit In its 2x2 binned mode the GC5035 uses a 175.2 MHz link frequency, set by the PLL of the vendor register sequence for that mode. List it, so that the driver can offer binning. Assisted-by: claude-opus-5-5 Signed-off-by: Nicola Fiorillo --- drivers/media/pci/intel/ipu-bridge.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/pci/intel/ipu-bridge.c b/drivers/media/pci/intel/ipu-bridge.c index 851096d7d..3caa07529 100644 --- a/drivers/media/pci/intel/ipu-bridge.c +++ b/drivers/media/pci/intel/ipu-bridge.c @@ -60,7 +60,7 @@ static const u16 ipu6_ov5693_ncont_clk[] = { static const struct ipu_sensor_config ipu_supported_sensors[] = { /* GalaxyCore GC5035 */ - IPU_SENSOR_CONFIG("GCTI5035", 1, 422400000), + IPU_SENSOR_CONFIG("GCTI5035", 2, 175200000, 422400000), /* GalaxyCore GC8034 */ IPU_SENSOR_CONFIG("GCTI8034", 1, 268800000), /* Himax HM1092 */ -- 2.47.3