From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A386E4915AE; Tue, 13 Oct 2026 06:06:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791871564; cv=none; b=ZbQkoqnYxj4ioHH3Abdejqbp/h9SR3CepFaytDL/PvNOH1iixX3LhzwjyYA3UJbJmhU9mZklHE2B1GKn2xwThjRjdYJg9olwhA9tFIgzfPYCWS0lzvKTjwqdWeK8i1Qhm8hyKFCHEtk+7qSr+dgOeXnavI/YDUeoMxKg0zqDM2s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791871564; c=relaxed/simple; bh=8gR7BhNXPoHr5C+6JPztbmGwaJrI/VU6fS5GUB1Vw7A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mISvu7QT08mJFC0vgd7+zWj6GDDSUSPLRwpZJ4gJqwXx9QE0+3IKzf5Ptv9ho1ZHCv1kwe6/rkTBTrQsP/FhtlwwOxhGR6E8ZbB9oRkz+PSsSpYarhI1wn7YMiQ7R8VZ1t/fGUlKEa1QGIUueHCtg14fXuRTIowj/NSYMU0CPyQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=onoa7e1C; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="onoa7e1C" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5CA8BC4DDEF; Tue, 13 Oct 2026 06:06:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1791871564; bh=8gR7BhNXPoHr5C+6JPztbmGwaJrI/VU6fS5GUB1Vw7A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=onoa7e1CUlsJYhcLJGA0zmGPxwin3Mt+TETFyEJZswVUdBA3YUCUrAJqFX0xRZ14F HWq90cSNeQCVK0vJM8wafyZBaGIBLh2szGEPmjjHp6L3q7iPbKKPVt3/T5Q6QvLxl/ B3t3KIeWlNjq7yTKU+I035P7RyMbcT4+yROm/0bs4OT48swgPK/v6Ly5L4FLBLirG8 TXu0g9heTksFBL4PslB++WcBLsfBtNPPTTvh6SUErpMTWCWoDjfe7YdhhgBVbT4ObW l/DiNIo0Rj4kKmDq/aOpErFjBZ4ZskDFSnIM5lfeuCgWKfml1yo/V2GCuOyl1mIMm9 ubGPVwwU42yCw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45F15CC6B0F; Tue, 13 Oct 2026 06:06:04 +0000 (UTC) From: Fil Dunsky via B4 Relay Date: Tue, 13 Oct 2026 09:06:07 +0300 Subject: [PATCH v6 06/10] dt-bindings: serial: Add Cortina Systems CS7542 UART Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261013-b4-cs75xx-v6-6-37e8f3969b7c@gmail.com> References: <20261013-b4-cs75xx-v6-0-37e8f3969b7c@gmail.com> In-Reply-To: <20261013-b4-cs75xx-v6-0-37e8f3969b7c@gmail.com> To: Arnd Bergmann , Linus Walleij , Krzysztof Kozlowski Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Jiri Slaby , Russell King , Alexandre Belloni , Drew Fustini , Lorenzo Pieralisi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, Jason Li , Fil Dunsky X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1791871561; l=1934; i=filipp.dunsky@gmail.com; s=20260930; h=from:subject:message-id; bh=DBYjTP1f13Z8VgqM2RKT5FXuSk8m/3+wuQ5DQ1oXB5o=; b=qSWuDw+s/4u0yX71Sj68tQeATA/3YFcXbqZnBGjUgbtjW7F5MS+7K/LFkOmAkPmydsls4V6LH DhyDQDylxDpBma729rvgzuhXDpvP22X/5zYJ+9/j+fTiVOsqxoUQOJ3 X-Developer-Key: i=filipp.dunsky@gmail.com; a=ed25519; pk=JAYP8e2rJ54DHOmhNtXud8rl1igAaAXoOHxtJmVXI1g= X-Endpoint-Received: by B4 Relay for filipp.dunsky@gmail.com/20260930 with auth_id=1085 X-Original-From: Fil Dunsky Reply-To: filipp.dunsky@gmail.com From: Fil Dunsky Add the binding for the UART found in the Cortina Systems CS75xx (Goldengate G2) SoCs such as the CS7542. Reviewed-by: Linus Walleij Signed-off-by: Fil Dunsky --- .../bindings/serial/cortina,cs7542-uart.yaml | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/cortina,cs7542-uart.yaml b/Documentation/devicetree/bindings/serial/cortina,cs7542-uart.yaml new file mode 100644 index 000000000..2879a7188 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/cortina,cs7542-uart.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serial/cortina,cs7542-uart.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cortina UART + +maintainers: + - Fil Dunsky + +description: + The UART found in the Cortina Systems CS7542 (Goldengate G2) SoC. It has + transmit and receive FIFOs and a 24-bit baud rate divider running from the + peripheral (APB) clock. Other SoCs with the same block, the rest of the + CS75xx family and the Cortina Access parts, are to be added with their own + compatible string and "cortina,cs7542-uart" as the fallback. + +allOf: + - $ref: serial.yaml# + +properties: + compatible: + const: cortina,cs7542-uart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + + serial@f0070110 { + compatible = "cortina,cs7542-uart"; + reg = <0xf0070110 0x30>; + interrupts = ; + clocks = <&apb_clk>; + }; -- 2.53.0