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Tue, 13 Oct 2026 08:18:53 -0700 (PDT) From: Akari Tsuyukusa To: Brian Masney , Jerome Brunet , Matthias Brugger , AngeloGioacchino Del Regno , Yassine Oudjana , Richard Cochran Cc: Chen-Yu Tsai , Bartosz Golaszewski , Kees Cook , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig=20=28The=20Capable=20Hub=29?= , Danilo Krummrich , Nicolas Frattaroli , Bjorn Helgaas , Takashi Sakamoto , Haotian Zhang , Miles Chen , Sam Shih , Daniel Golle , Chun-Jie Chen , Laura Nao , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK), linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC support), linux-mediatek@lists.infradead.org (moderated list:ARM/Mediatek SoC support), Akari Tsuyukusa , stable@vger.kernel.org Subject: [PATCH v2 10/35] clk: mediatek: Fix memory leak in mtk_clk_register_gate() Date: Wed, 14 Oct 2026 00:17:09 +0900 Message-ID: <20261013151734.3177690-11-akkun11.open@gmail.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261013151734.3177690-1-akkun11.open@gmail.com> References: <20261013151734.3177690-1-akkun11.open@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit When a gate uses the hardware voter ops but the hardware voter regmap is missing (e.g. the "mediatek,hardware-voter" phandle is absent from the device tree), mtk_clk_register_gate() returns an error without freeing the mtk_clk_gate structure allocated earlier. Free cg on this error path. Fixes: e504d3bdb3d0 ("clk: mediatek: clk-gate: Add ops for gates with HW voter") Assisted-by: LLM Cc: stable@vger.kernel.org Signed-off-by: Akari Tsuyukusa --- Newly introduced in v2. --- drivers/clk/mediatek/clk-gate.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c index bd2fcd489a3f..0b1389993751 100644 --- a/drivers/clk/mediatek/clk-gate.c +++ b/drivers/clk/mediatek/clk-gate.c @@ -221,10 +221,12 @@ static struct clk_hw *mtk_clk_register_gate(struct device *dev, init.parent_names = gate->parent_name ? &gate->parent_name : NULL; init.num_parents = gate->parent_name ? 1 : 0; init.ops = gate->ops; - if (mtk_cg_uses_hwv(init.ops) && !regmap_hwv) + if (mtk_cg_uses_hwv(init.ops) && !regmap_hwv) { + kfree(cg); return dev_err_ptr_probe( dev, -ENXIO, "regmap not found for hardware voter clocks\n"); + } cg->regmap = regmap; cg->regmap_hwv = regmap_hwv; -- 2.56.0