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[2a02:3100:a189:2701:8c58:155a:279:7389]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a1b481b7f8sm5237345e9.3.2026.10.13.13.31.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 13 Oct 2026 13:32:00 -0700 (PDT) From: Karl Mehltretter To: Russell King , Miguel Ojeda Cc: Karl Mehltretter , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , Danilo Krummrich , Daniel Almeida , Tamir Duberstein , Alexandre Courbot , =?UTF-8?q?Onur=20=C3=96zkan?= , Arnd Bergmann , Linus Walleij , Christian Schrefl , Bradley Morgan , "Paul E . McKenney" , Peter Zijlstra , FUJITA Tomonori , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , linux-arm-kernel@lists.infradead.org, rust-for-linux@vger.kernel.org, llvm@lists.linux.dev, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/6] ARM: rust: Enable Rust support for ARMv6K-only kernels Date: Tue, 13 Oct 2026 22:31:37 +0200 Message-Id: <20261013203140.31741-4-kmehltretter@gmail.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20261013203140.31741-1-kmehltretter@gmail.com> References: <20261013203140.31741-1-kmehltretter@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit HAVE_RUST currently requires CPU_32v7, excluding ARMv6K-only kernels even though arm-unknown-linux-gnueabi already builds ARMv6 code. Select HAVE_RUST for CPU_32v6K. CPU_V7 selects CPU_32v6K, so ARMv7 remains covered. Keep plain ARMv6 (CPU_V6, ARM1136r0) excluded. It lacks 1- and 2-byte xchg() and 2-byte cmpxchg(), which the Rust atomic helpers need. The old condition exposes Rust on combined CPU_V6 and ARMv7 kernels, which do not link. Tested the Rust samples, KUnit suites and doctests in QEMU raspi0 (ARM1176) with bcm2835_defconfig without ARCH_MULTI_V7. Assisted-by: LLM Signed-off-by: Karl Mehltretter --- Tested the full six-patch series on a Raspberry Pi 1 Model B+ Rev 1.2 (ARM1176JZF-S), with bcm2835_defconfig without ARCH_MULTI_V7, clang 22.1.8, rustc 1.99.0 and bindgen 0.73.2. All 368 doctests and the Rust KUnit suites passed. The intentionally disabled KUnit selftest was skipped. Ten Rust modules loaded and unloaded. Misc ioctls, configfs, scoped debugfs and rnull read/write checks passed. No warnings or oopses in the test kernel. Documentation/rust/arch-support.rst | 2 +- arch/arm/Kconfig | 2 +- rust/helpers/atomic_ext.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/rust/arch-support.rst b/Documentation/rust/arch-support.rst index 4f980815e92a..bdc42a24bf30 100644 --- a/Documentation/rust/arch-support.rst +++ b/Documentation/rust/arch-support.rst @@ -15,7 +15,7 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file. ============= ================ ============================================== Architecture Level of support Constraints ============= ================ ============================================== -``arm`` Maintained ARMv7 Little Endian only. +``arm`` Maintained ARMv6K and ARMv7, Little Endian only. ``arm64`` Maintained Little Endian only. ``loongarch`` Maintained \- ``riscv`` Maintained ``riscv64`` and LLVM/Clang only. diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ffbc7f386131..b5816f28783a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -138,7 +138,7 @@ config ARM select MMU_GATHER_RCU_TABLE_FREE if SMP && ARM_LPAE select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_RSEQ - select HAVE_RUST if CPU_LITTLE_ENDIAN && CPU_32v7 && !KASAN + select HAVE_RUST if CPU_LITTLE_ENDIAN && CPU_32v6K && !CPU_V6 && !KASAN select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS select HAVE_UID16 diff --git a/rust/helpers/atomic_ext.c b/rust/helpers/atomic_ext.c index c267d5190529..1d157df29229 100644 --- a/rust/helpers/atomic_ext.c +++ b/rust/helpers/atomic_ext.c @@ -42,7 +42,7 @@ GEN_READ_SET_HELPERS(ptr, const void *) * xchg helpers depend on ARCH_SUPPORTS_ATOMIC_RMW and on the * architecture provding xchg() support for i8 and i16. * - * The architectures that currently support Rust (x86_64, armv7, + * The architectures that currently support Rust (x86_64, arm, * arm64, riscv, and loongarch) satisfy these requirements. */ #define GEN_XCHG_HELPER(tname, type, suffix) \ @@ -66,7 +66,7 @@ GEN_XCHG_HELPERS(ptr, const void *) * try_cmpxchg helpers depend on ARCH_SUPPORTS_ATOMIC_RMW and on the * architecture provding try_cmpxchg() support for i8 and i16. * - * The architectures that currently support Rust (x86_64, armv7, + * The architectures that currently support Rust (x86_64, arm, * arm64, riscv, and loongarch) satisfy these requirements. */ #define GEN_TRY_CMPXCHG_HELPER(tname, type, suffix) \ -- 2.39.5 (Apple Git-154)