From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 698BA2620DE for ; Wed, 14 Oct 2026 01:03:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791939811; cv=none; b=kSfB5/2xF/SHKzJox3Cs65wgJgMA/G1DU6jNM9xVo0/tMEUNWoKDqLuA4H3Af3uVktwUOQ20sGKbb+taCIZt/rEe5GTwXFSAdxvHJ54zJVxG5qyHE8Dx6kHfIhoTp2brA8ydU9HKrXn6kn2SgESMc/KSkSCa4qgVC89MeCm1M3s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791939811; c=relaxed/simple; bh=ccpopn9Y9LAmIjVmaGfBkmnfpoFJvMf4XBoclWEOsYY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=q5hazAa9luWlVSzFGnzKesC1sUoAFksxwbcX4C/f6uWpChs1sA6VtE+6AMnZQNiTVy03sozP+Y0hxuvRCLuUeEvjnfdelZEoO63XueJFqDe0Il2frZR9+s4vmMCRC7L4wgpnviOfstEEigNeFk9z+j+WylxzRV6VPRylAgJi0N4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=ZK968R6A; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="ZK968R6A" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1791939808; bh=ccpopn9Y9LAmIjVmaGfBkmnfpoFJvMf4XBoclWEOsYY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ZK968R6An9g192Divilug2aqf7VKIPOmr2LnyX3rDb/d6crg4OyEl02eXHSWZmOw0 eguDWFLp0Dq4C8nhmDWqpnmdkUZm6O/lN0ZkTy2l0UregbFFaUIbHXFu2lSlPLGf3M 3CgQe6cGL+bjsbyocHvP9zhwTgQcc3miyB+q/TpjAPdAcwcQa5YCVT5rLOIHh0cRzm qsgj1pJTFgUGlQbeKjxsb71V2R8pqjURWvx1etluDX23palVliV+Y/HMg0uqh+jCMu JqB2+hB43Sg5H/NZrjW0ID2gVEa49FNAHgGw6UIGAlcMqpxAPj0O0lNagtlaVsXnId Sn2qcOj7E4lsQ== Received: from localhost (unknown [100.64.0.241]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange secp256r1 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by bali.collaboradmins.com (Postfix) with ESMTPSA id 7CFFF17E043C; Wed, 14 Oct 2026 03:03:28 +0200 (CEST) From: Cristian Ciocaltea Date: Wed, 14 Oct 2026 04:03:08 +0300 Subject: [PATCH v3 1/9] drm/vc4: hdmi: Use common TMDS char rate constants Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261014-vc4-common-scramb-v3-1-c68d58d959a2@collabora.com> References: <20261014-vc4-common-scramb-v3-0-c68d58d959a2@collabora.com> In-Reply-To: <20261014-vc4-common-scramb-v3-0-c68d58d959a2@collabora.com> To: Maxime Ripard , Dave Stevenson , =?utf-8?q?Ma=C3=ADra_Canal?= , Raspberry Pi Kernel Maintenance , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Simona Vetter Cc: kernel@collabora.com, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 Replace HDMI_14_MAX_TMDS_CLK defined locally with HDMI_1_3_TMDS_CHAR_RATE_MAX_HZ provided by linux/hdmi.h. Note this incorrectly referenced HDMI 1.4, as the 340 MHz maximum TMDS character rate was actually introduced in HDMI 1.3. Similarly, use HDMI_2_0_TMDS_CHAR_RATE_MAX_HZ instead of the 600000000 magic number. Reviewed-by: Dave Stevenson Acked-by: Maxime Ripard Signed-off-by: Cristian Ciocaltea --- drivers/gpu/drm/vc4/vc4_hdmi.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 3a90dbb61f4e..8e4623ccc4f8 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -45,6 +45,7 @@ #include #include #include +#include #include #include #include @@ -113,8 +114,6 @@ #define HSM_MIN_CLOCK_FREQ 120000000 #define CEC_CLOCK_FREQ 40000 -#define HDMI_14_MAX_TMDS_CLK (340 * 1000 * 1000) - static bool vc4_hdmi_supports_scrambling(struct vc4_hdmi *vc4_hdmi) { struct drm_display_info *display = &vc4_hdmi->connector.display_info; @@ -137,7 +136,7 @@ static bool vc4_hdmi_mode_needs_scrambling(const struct drm_display_mode *mode, { unsigned long long clock = drm_hdmi_compute_mode_clock(mode, bpc, fmt); - return clock > HDMI_14_MAX_TMDS_CLK; + return clock > HDMI_1_3_TMDS_CHAR_RATE_MAX_HZ; } static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused) @@ -1728,7 +1727,7 @@ vc4_hdmi_connector_clock_valid(const struct drm_connector *connector, if (clock > vc4_hdmi->variant->max_pixel_clock) return MODE_CLOCK_HIGH; - if (!vc4->hvs->vc5_hdmi_enable_hdmi_20 && clock > HDMI_14_MAX_TMDS_CLK) + if (!vc4->hvs->vc5_hdmi_enable_hdmi_20 && clock > HDMI_1_3_TMDS_CHAR_RATE_MAX_HZ) return MODE_CLOCK_HIGH; /* 4096x2160@60 is not reliable without overclocking core */ @@ -3254,7 +3253,7 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) * vc4_hdmi_disable_scrambling() will thus run at boot, make * sure it's disabled, and avoid any inconsistency. */ - if (variant->max_pixel_clock > HDMI_14_MAX_TMDS_CLK) + if (variant->max_pixel_clock > HDMI_1_3_TMDS_CHAR_RATE_MAX_HZ) vc4_hdmi->scdc_enabled = true; ret = variant->init_resources(drm, vc4_hdmi); @@ -3384,7 +3383,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI0, .debugfs_name = "hdmi0_regs", .card_name = "vc4-hdmi-0", - .max_pixel_clock = 600000000, + .max_pixel_clock = HDMI_2_0_TMDS_CHAR_RATE_MAX_HZ, .registers = vc5_hdmi_hdmi0_fields, .num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields), .phy_lane_mapping = { @@ -3413,7 +3412,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI1, .debugfs_name = "hdmi1_regs", .card_name = "vc4-hdmi-1", - .max_pixel_clock = HDMI_14_MAX_TMDS_CLK, + .max_pixel_clock = HDMI_1_3_TMDS_CHAR_RATE_MAX_HZ, .registers = vc5_hdmi_hdmi1_fields, .num_registers = ARRAY_SIZE(vc5_hdmi_hdmi1_fields), .phy_lane_mapping = { @@ -3442,7 +3441,7 @@ static const struct vc4_hdmi_variant bcm2712_hdmi0_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI0, .debugfs_name = "hdmi0_regs", .card_name = "vc4-hdmi-0", - .max_pixel_clock = 600000000, + .max_pixel_clock = HDMI_2_0_TMDS_CHAR_RATE_MAX_HZ, .registers = vc6_hdmi_hdmi0_fields, .num_registers = ARRAY_SIZE(vc6_hdmi_hdmi0_fields), .phy_lane_mapping = { @@ -3469,7 +3468,7 @@ static const struct vc4_hdmi_variant bcm2712_hdmi1_variant = { .encoder_type = VC4_ENCODER_TYPE_HDMI1, .debugfs_name = "hdmi1_regs", .card_name = "vc4-hdmi-1", - .max_pixel_clock = 600000000, + .max_pixel_clock = HDMI_2_0_TMDS_CHAR_RATE_MAX_HZ, .registers = vc6_hdmi_hdmi1_fields, .num_registers = ARRAY_SIZE(vc6_hdmi_hdmi1_fields), .phy_lane_mapping = { -- 2.55.0