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Wed, 14 Oct 2026 00:23:13 -0700 (PDT) Received: from navid-pc ([2a01:4b00:a856:6220::a11]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48de3f7f8b8sm8500933f8f.35.2026.10.14.00.23.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 00:23:13 -0700 (PDT) From: Navid Ghahremani To: linux-arm-kernel@lists.infradead.org Cc: arnd@arndb.de, stefandoesinger@gmail.com, krzk@kernel.org, Navid Ghahremani , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 19/24] dt-bindings: spi: Add ZTE ZX family SPI flash controller binding Date: Wed, 14 Oct 2026 08:20:59 +0100 Message-ID: <20261014072109.1759502-20-ghahramani.navid@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261014072109.1759502-1-ghahramani.navid@gmail.com> References: <20261014072109.1759502-1-ghahramani.navid@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add Device Tree binding for the ZTE ZX family SPI flash controller, supporting both ZX29 and ZX279128S SoCs. Signed-off-by: Navid Ghahremani --- .../bindings/spi/zte,zx279128s-spifc.yaml | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/zte,zx279128s-spifc.yaml diff --git a/Documentation/devicetree/bindings/spi/zte,zx279128s-spifc.yaml b/Documentation/devicetree/bindings/spi/zte,zx279128s-spifc.yaml new file mode 100644 index 0000000000..201fe46b2f --- /dev/null +++ b/Documentation/devicetree/bindings/spi/zte,zx279128s-spifc.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/zte,zx279128s-spifc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ZTE zx279128s SPI flash controller + +maintainers: + - Stefan Dösinger + - Navid Ghahremani + +description: + The SPI flash controller of the ZTE zx279128s runs flash operations (an + opcode with optional address, dummy and data phases) on one chip select. + The data phase can use one, two or four lines. + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + enum: + - zte,zx29-qspi + - zte,zx279128s-spifc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: work clock, the source of the SPI clock + - description: register (APB) clock + + clock-names: + items: + - const: wclk + - const: pclk + +required: + - compatible + - reg + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + + spi@94406000 { + compatible = "zte,zx279128s-spifc"; + reg = <0x94406000 0x1000>; + interrupts = ; + clocks = <&lsp0crpm ZX279128S_LSP0_SPI_WCLK>, + <&lsp0crpm ZX279128S_LSP0_SPI_PCLK>; + clock-names = "wclk", "pclk"; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-rx-bus-width = <2>; + }; + }; -- 2.55.0