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Wed, 14 Oct 2026 01:21:40 -0700 (PDT) Received: from wenst-7875.tpe.corp.google.com ([2a00:79e0:203d:7:373a:9eb7:c5ba:7b5c]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3ac5f04e324sm3682141a91.2.2026.10.14.01.21.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Oct 2026 01:21:39 -0700 (PDT) From: Chen-Yu Tsai To: Greg Kroah-Hartman , Felipe Balbi , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chen-Yu Tsai , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Sven Peter , Janne Grunau , Neal Gompa , Joel Stanley , Andrew Jeffery , Ryan Chen , Billy Tsai , Michal Simek , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Peter Griffin , =?UTF-8?q?Andr=C3=A9=20Draszik?= , Tudor Ambarus , Heiko Stuebner , Alim Akhtar , Kunihiko Hayashi , Masami Hiramatsu , Yixun Lan , Troy Mitchell , Minda Chen , Shyam Pandey , Wei Yang , Senchuan Zhang , Hang Cao , Li Jun , Peng Fan , Roy Luo , Yang Xiwen , Ahmad Zainie , Robert Marko , Xu Yang , Wesley Cheng , Stanley Chang , Ze Huang , Aswath Govindraju , Roger Quadros , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-aspeed@lists.ozlabs.org, imx@lists.linux.dev, linux-samsung-soc@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-riscv@lists.infradead.org, spacemit@lists.linux.dev Subject: [PATCH 2/2] dt-bindings: usb: snps,dwc3: Fix downstream port numbering Date: Wed, 14 Oct 2026 16:20:36 +0800 Message-ID: <20261014082037.1774672-3-wenst@chromium.org> X-Mailer: git-send-email 2.56.0.212.g129ede20d9-goog In-Reply-To: <20261014082037.1774672-1-wenst@chromium.org> References: <20261014082037.1774672-1-wenst@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The DWC3 controller can operate in host mode. It does so with a XHCI compliant host controller. The XHCI has two downstream ports, one for HS and one for SS. USB downstream ports start from 1, not 0. Reconcile the downstream port numbering with the common USB host binding, renumbering the downstream port numbers from 0 and 1 to 1 and 2. This is non-backwards compatible, however it won't break current major implementations: - dwc3 "gadget mode" in Linux kernel only requires a connection to be present; it doesn't matter which port it is - dwc3 "host mode" OF graph connections aren't supported yet [1] - FreeBSD doesn't use the OF graph for anything - U-boot doesn't use the OF graph for USB - OpenBSD doesn't support dwc3, only the XHCI in dwc3, and doesn't use the OF graph for USB - coreboot doesn't use the OF graph for anything - Zephyr doesn't support dwc3 - TF-A doesn't use the OF graph for anything - EDK2 doesn't support dwc3 and doesn't support OF graph - OP-TEE doesn't support dwc3 and doesn't support OF graph [1] WIP to tie OF graph port node to USB port device Fixes: a33113f73693 ("dt-bindings: usb: snps,dwc3: document HS & SS OF graph ports") Signed-off-by: Chen-Yu Tsai --- It is unclear to me whether the HS/SS numbering is fixed for all dwc3 variants. I checked Allwinner H616 and Rockchip RK3588 and they both have HS as port 1 and SS as port 2. This also doesn't cover a potential "multi-port" DWC3 implementation, which Qualcomm seems to have. --- Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml index 6c0b8b653824..4b6304bd2ec1 100644 --- a/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml +++ b/Documentation/devicetree/bindings/usb/snps,dwc3-common.yaml @@ -410,11 +410,11 @@ properties: property is used. properties: - port@0: + port@1: $ref: /schemas/graph.yaml#/properties/port description: High Speed (HS) data bus. - port@1: + port@2: $ref: /schemas/graph.yaml#/properties/port description: Super Speed (SS) data bus. -- 2.56.0.212.g129ede20d9-goog