From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 987D84315F; Wed, 14 Oct 2026 16:11:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.3 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791994320; cv=none; b=QF80XQHUBm/Kuki5WvTPSB4Nd+jH/wOc9Q0ynY2GZmFISAz4lu0uAnriaqCw+Qc2c1sqHStaIkyL82vopjdbvlFA2iGxzsk+2KYFECMuftbi6OWyVBdnU++/Comze+zd5m7r3Z8honQVQj6yLyFLuFpEvHb57C1dQPfTGy20/uQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1791994320; c=relaxed/simple; bh=5zVPofWHhzcIGEaXG23OGwRbuySQ6OnDOtMmjK+5gKo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Eo+V9vLGJ5eJbg4dIfPiYxnuwYG4eTFNfShFoYXZhtLz0gvqssPoApQgXTmbRvGuGSgZboBOkK58UDMKaXQ5v5JdWsrfrFXmRJQUsyxxIIpAiMXjqtd5CBmTHSa/fkXJqq32dvXN69HXVvo3EN/ZESQtXOJ7VFS6mMoNwZER/9k= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=HuRHChRJ; arc=none smtp.client-ip=220.197.31.3 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="HuRHChRJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:To:Subject:Date:Message-ID:MIME-Version; bh=o1 xNoGNlDuv8dcA05o9muZ1QtkmEswQhTqN6SrXTfWI=; b=HuRHChRJv/jlQNiIMf 16PHgfNcZnlrAjoqtMercf5+sXqdV8TdXJ89LDiYx5Ql2YslJqnDuglgj7gautHv qNDVkCo+7lOsAJeZSrhHEXoFUOAWocWRGOdm490fyPYjLYSKsjjTDN9P29FSGaGj fCmPdss/y1J0XEOk4CD29/m6Q= Received: from fedora (unknown []) by gzga-smtp-mtada-g0-1 (Coremail) with SMTP id _____wD3v15Gqc9qxM0iAA--.40892S3; Thu, 15 Oct 2026 00:09:54 +0800 (CST) From: Ju Nan To: junan76@163.com, antonio.borneo@foss.st.com, bigeasy@linutronix.de, linusw@kernel.org Cc: alexandre.torgue@foss.st.com, arnd@arndb.de, clrkwllms@kernel.org, lee@kernel.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, linux-stm32@st-md-mailman.stormreply.com, mcoquelin.stm32@gmail.com, mfd@lists.linux.dev, rostedt@goodmis.org, u.kleine-koenig@pengutronix.de Subject: [PATCH v4 1/2] pinctrl: stm32: Fix the unit of the hwspinlock timeout Date: Thu, 15 Oct 2026 00:09:17 +0800 Message-ID: <20261014160917.139241-3-junan76@163.com> X-Mailer: git-send-email 2.56.0 In-Reply-To: <20261014160917.139241-2-junan76@163.com> References: <20261014160917.139241-2-junan76@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:_____wD3v15Gqc9qxM0iAA--.40892S3 X-Coremail-Antispam: 1Uf129KBjvJXoWxAFyDGw4kXr43uF47WFWxZwb_yoW5tw1fpF Zagwn0yrs8XrW5Zw4DtF4q9rnxJa1Iyw4DJFWjqa48Zr1jqr95Ja1Sqa92yF12qas7J3ZI qFW2q345ua1DAaUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0zEs2-8UUUUU= X-CM-SenderInfo: pmxqt0ixw6il2tof0z/xtbC0xINvmrPqVIcfQAA3N HWSPNLCK_TIMEOUT is passed to hwspin_lock_timeout_in_atomic(), whose timeout argument is in milliseconds, not microseconds: atomic_delay += HWSPINLOCK_RETRY_DELAY_US; if (atomic_delay > to * 1000) return -ETIMEDOUT; The hwspinlock core documents this explicitly: If the mode is HWLOCK_IN_ATOMIC (called from an atomic context) the timeout is handled with busy-waiting delays, hence shall not exceed few msecs. Fixes: 290a9f937e5a ("pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API") Signed-off-by: Ju Nan --- drivers/pinctrl/stm32/pinctrl-stm32.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index 6a99708a5a23..e71651d4fad4 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -87,7 +87,7 @@ #define gpio_range_to_bank(chip) \ container_of(chip, struct stm32_gpio_bank, range) -#define HWSPNLCK_TIMEOUT 1000 /* usec */ +#define HWSPNLCK_TIMEOUT_MS 1 static const char * const stm32_gpio_functions[] = { "gpio", "af0", "af1", @@ -609,7 +609,7 @@ static int stm32_gpio_domain_activate(struct irq_domain *d, if (pctl->hwlock) { ret = hwspin_lock_timeout_in_atomic(pctl->hwlock, - HWSPNLCK_TIMEOUT); + HWSPNLCK_TIMEOUT_MS); if (ret) { dev_err(pctl->dev, "Can't get hwspinlock\n"); return ret; @@ -946,7 +946,7 @@ static int stm32_pmx_set_mode(struct stm32_gpio_bank *bank, if (pctl->hwlock) { err = hwspin_lock_timeout_in_atomic(pctl->hwlock, - HWSPNLCK_TIMEOUT); + HWSPNLCK_TIMEOUT_MS); if (err) { dev_err(pctl->dev, "Can't get hwspinlock\n"); goto unlock; @@ -1089,7 +1089,7 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank, if (pctl->hwlock) { err = hwspin_lock_timeout_in_atomic(pctl->hwlock, - HWSPNLCK_TIMEOUT); + HWSPNLCK_TIMEOUT_MS); if (err) { dev_err(pctl->dev, "Can't get hwspinlock\n"); goto unlock; @@ -1135,7 +1135,7 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank, if (pctl->hwlock) { err = hwspin_lock_timeout_in_atomic(pctl->hwlock, - HWSPNLCK_TIMEOUT); + HWSPNLCK_TIMEOUT_MS); if (err) { dev_err(pctl->dev, "Can't get hwspinlock\n"); goto unlock; @@ -1181,7 +1181,7 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank, if (pctl->hwlock) { err = hwspin_lock_timeout_in_atomic(pctl->hwlock, - HWSPNLCK_TIMEOUT); + HWSPNLCK_TIMEOUT_MS); if (err) { dev_err(pctl->dev, "Can't get hwspinlock\n"); goto unlock; @@ -1242,7 +1242,7 @@ static int stm32_pconf_set_advcfgr(struct stm32_gpio_bank *bank, int offset, u32 spin_lock_irqsave(&bank->lock, flags); if (pctl->hwlock) { - err = hwspin_lock_timeout_in_atomic(pctl->hwlock, HWSPNLCK_TIMEOUT); + err = hwspin_lock_timeout_in_atomic(pctl->hwlock, HWSPNLCK_TIMEOUT_MS); if (err) { dev_err(pctl->dev, "Can't get hwspinlock\n"); goto unlock; @@ -1320,7 +1320,7 @@ stm32_pconf_set_skew_delay(struct stm32_gpio_bank *bank, int offset, u32 delay, spin_lock_irqsave(&bank->lock, flags); if (pctl->hwlock) { - err = hwspin_lock_timeout_in_atomic(pctl->hwlock, HWSPNLCK_TIMEOUT); + err = hwspin_lock_timeout_in_atomic(pctl->hwlock, HWSPNLCK_TIMEOUT_MS); if (err) { dev_err(pctl->dev, "Can't get hwspinlock\n"); goto unlock; -- 2.56.0