[PATCH v9 2/2] clk: Add gpio-enabled clock driver

[Vyacheslav Yurkov via B4 Relay <devnull+V.Yurkov.EXT.bruker.com@kernel.org>]

From: Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>

A gpio-enabled clock exposes a clock, which status is determined by a
GPIO signal. The common use-case is a FPGA-assisted clocking design
where peripheral clocks are generated by FPGA PLLs that are outside
CPU control, with clock-valid/PLL-lock status exposed through GPIO signals.
Consumers can use the output clock to wait until the input clock is enabled
and only then initialize dependent peripherals.

Signed-off-by: Vyacheslav Yurkov <V.Yurkov.EXT@bruker.com>
---
 drivers/clk/clk-gpio.c | 161 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 161 insertions(+)

diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c
index 9099c57e2715..c968c1d4cb1c 100644
--- a/drivers/clk/clk-gpio.c
+++ b/drivers/clk/clk-gpio.c
@@ -15,6 +15,7 @@
 #include <linux/gpio/consumer.h>
 #include <linux/err.h>
 #include <linux/device.h>
+#include <linux/iopoll.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/regulator/consumer.h>
@@ -241,6 +242,166 @@ static struct platform_driver gpio_clk_driver = {
 };
 builtin_platform_driver(gpio_clk_driver);
 
+/**
+ * DOC: Clock which status is determined by a GPIO signal
+ * Traits of this clock:
+ * prepare - clk_prepare (is_prepared) checks for a sleeping gpio
+ * enable - clk_enable (is_enabled) checks for a non-sleeping gpio
+ */
+
+/**
+ * struct clk_gpio_enabled - gpio enabled clock
+ *
+ * @hw:		handle between common and hardware-specific interfaces
+ * @gpiod:	gpio descriptor
+ * @timeout_us:	timeout that is used to get a GPIO value
+ *
+ * Clock, which status is determined by a GPIO signal.
+ *
+ * Implements .enable, .is_enabled or .prepare, .is_prepared
+ */
+struct clk_gpio_enabled {
+	struct clk_hw hw;
+	struct gpio_desc *gpiod;
+	u32 timeout_us;
+};
+
+#define to_clk_gpio_enabled(_hw) container_of(_hw, struct clk_gpio_enabled, hw)
+#define GPIO_ENABLED_TIMEOUT_MIN 10
+#define GPIO_ENABLED_TIMEOUT_MAX 1000
+#define GPIO_ENABLED_TIMEOUT_DEFAULT 10
+
+static int clk_gpio_enabled_sleeping_is_prepared(struct clk_hw *hw)
+{
+	struct clk_gpio_enabled *clk = to_clk_gpio_enabled(hw);
+
+	return gpiod_get_value_cansleep(clk->gpiod) > 0;
+}
+
+/* We can't prepare the clock, but the Common Clock Framework calls only
+ * prepare() not is_prepared(), therefore we fallback on the actual GPIO value.
+ * The function clk_gpio_enabled_sleeping_is_prepared() returns the raw boolean
+ * GPIO status (1 if enabled, 0 if not enabled), but the prepare callback
+ * clk_core_prepare() expects 0 for success and non-zero integer for failure.
+ */
+static int clk_gpio_enabled_sleeping_prepare(struct clk_hw *hw)
+{
+	struct clk_gpio_enabled *clk = to_clk_gpio_enabled(hw);
+	int value = 0;
+
+	readx_poll_timeout(gpiod_get_value_cansleep, clk->gpiod, value,
+			value != 0, 10, clk->timeout_us);
+	if (value == 1)
+		return 0;
+
+	return -EBUSY;
+}
+
+static const struct clk_ops clk_gpio_enabled_sleeping_ops = {
+	.prepare =	clk_gpio_enabled_sleeping_prepare,
+	.is_prepared =	clk_gpio_enabled_sleeping_is_prepared,
+};
+
+static int clk_gpio_enabled_is_enabled(struct clk_hw *hw)
+{
+	struct clk_gpio_enabled *clk = to_clk_gpio_enabled(hw);
+
+	return gpiod_get_value(clk->gpiod) > 0;
+}
+
+/* We can't enable the clock, but the Common Clock Framework calls only
+ * enable() not is_enabled(), therefore we fallback on the actual GPIO value.
+ * The function clk_gpio_enabled_is_enabled() returns the raw boolean
+ * GPIO status (1 if enabled, 0 if not enabled), but the enable callback
+ * clk_core_enable() expects 0 for success and non-zero integer for failure.
+ */
+static int clk_gpio_enabled_enable(struct clk_hw *hw)
+{
+	struct clk_gpio_enabled *clk = to_clk_gpio_enabled(hw);
+	int value = 0;
+
+	readx_poll_timeout_atomic(gpiod_get_value, clk->gpiod, value,
+			value != 0, 10, clk->timeout_us);
+
+	/* If the reading timed out or return an error,
+	 * it means the clock is not ready
+	 */
+	if (value == 1)
+		return 0;
+
+	return -EBUSY;
+}
+
+static const struct clk_ops clk_gpio_enabled_ops = {
+	.enable =	clk_gpio_enabled_enable,
+	.is_enabled =	clk_gpio_enabled_is_enabled,
+};
+
+static int gpio_enabled_clk_driver_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct clk_gpio_enabled *clk;
+	const char *clk_name;
+	const struct clk_ops *ops;
+	const struct clk_parent_data gpio_parent_data[] = {
+		{ .index = 0 },
+	};
+	u32 timeout_us = GPIO_ENABLED_TIMEOUT_DEFAULT;
+	int ret = 0;
+
+	clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
+	if (!clk)
+		return -ENOMEM;
+
+	clk->gpiod = devm_gpiod_get(dev, "enabled", GPIOD_IN);
+	if (IS_ERR(clk->gpiod))
+		return dev_err_probe(dev, PTR_ERR(clk->gpiod),
+				     "Can't get enabled GPIO property\n");
+
+	ret = device_property_read_string(dev, "clock-output-names", &clk_name);
+	if (ret)
+		clk_name = fwnode_get_name(dev->fwnode);
+
+	device_property_read_u32(dev, "poll-timeout-us", &timeout_us);
+	if (timeout_us < GPIO_ENABLED_TIMEOUT_MIN ||
+	    timeout_us > GPIO_ENABLED_TIMEOUT_MAX)
+		return dev_err_probe(dev, -EINVAL,
+				     "poll-timeout-us is out of range [%u, %u]\n",
+				     GPIO_ENABLED_TIMEOUT_MIN,
+				     GPIO_ENABLED_TIMEOUT_MAX);
+	clk->timeout_us = timeout_us;
+
+	if (gpiod_cansleep(clk->gpiod))
+		ops = &clk_gpio_enabled_sleeping_ops;
+	else
+		ops = &clk_gpio_enabled_ops;
+
+	clk->hw.init = CLK_HW_INIT_PARENTS_DATA
+		(clk_name, gpio_parent_data, ops, 0);
+
+	/* register the clock */
+	ret = devm_clk_hw_register(dev, &clk->hw);
+	if (ret)
+		return dev_err_probe(dev, ret,
+				     "Failed to register clock\n");
+
+	return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, &clk->hw);
+}
+
+static const struct of_device_id gpio_enabled_clk_match_table[] = {
+	{ .compatible = "gpio-enabled-clock" },
+	{ }
+};
+
+static struct platform_driver gpio_enabled_clk_driver = {
+	.probe		= gpio_enabled_clk_driver_probe,
+	.driver		= {
+		.name	= "gpio-enabled-clk",
+		.of_match_table = gpio_enabled_clk_match_table,
+	},
+};
+builtin_platform_driver(gpio_enabled_clk_driver);
+
 /**
  * DOC: gated fixed clock, controlled with a gpio output and a regulator
  * Traits of this clock:

-- 
2.34.1