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Date: Wed, 14 Oct 2026 22:16:50 -0500
From: Rob Herring <robh@kernel.org>
To: Paul Louvel <paul.louvel@bootlin.com>
Cc: Borislav Petkov <bp@alien8.de>, Tony Luck <tony.luck@intel.com>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>, linux-kernel@vger.kernel.org,
	linux-renesas-soc@vger.kernel.org, linux-edac@vger.kernel.org,
	devicetree@vger.kernel.org,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Herve Codina <herve.codina@bootlin.com>,
	Wolfram Sang <wsa+renesas@sang-engineering.com>
Subject: Re: [PATCH v6 1/3] dt-bindings: edac: cdns,ddr-edac: add Cadence DDR
 EDAC
Message-ID: <20261015031650.GA370919-robh@kernel.org>
References: <20261013-paul-v7-3-rc1-edac-v6-0-2f1d6f2f74db@bootlin.com>
 <20261013-paul-v7-3-rc1-edac-v6-1-2f1d6f2f74db@bootlin.com>
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In-Reply-To: <20261013-paul-v7-3-rc1-edac-v6-1-2f1d6f2f74db@bootlin.com>

On Tue, Oct 13, 2026 at 12:44:58PM +0200, Paul Louvel wrote:
> Add the Cadence EDAC dt binding.
> The memory controller optionally supports ECC SECDED with DDR2/DDR3
> memory.
> 
> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Signed-off-by: Paul Louvel (Schneider Electric) <paul.louvel@bootlin.com>

Missing my Reviewed-by.