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A callback that needs a platform-specific check on top of that register would have to duplicate the register read. Factor the check out into dw_pcie_link_up_debug_check() and export it for modular glue drivers. pcie-rcar-gen4 will be the first user: its APP link-up events remain latched after the link goes down, so it has to combine them with the live PORT_LINK_DEBUG1 state. No functional change. Suggested-by: Marek Vasut Signed-off-by: Koichiro Den --- Changes since v3: - No changes. drivers/pci/controller/dwc/pcie-designware.c | 15 +++++++++++---- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index c726aa71c830..49a9ba910ba8 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -817,17 +817,24 @@ int dw_pcie_wait_for_link(struct dw_pcie *pci) } EXPORT_SYMBOL_GPL(dw_pcie_wait_for_link); -bool dw_pcie_link_up(struct dw_pcie *pci) +/* Link state from PORT_LINK_DEBUG1: up and not in training */ +bool dw_pcie_link_up_debug_check(struct dw_pcie *pci) { u32 val; - if (pci->ops && pci->ops->link_up) - return pci->ops->link_up(pci); - val = dw_pcie_readl_dbi(pci, PORT_LINK_DEBUG1); return ((val & PORT_LINK_DEBUG1_LINK_UP) && (!(val & PORT_LINK_DEBUG1_LINK_IN_TRAINING))); } +EXPORT_SYMBOL_GPL(dw_pcie_link_up_debug_check); + +bool dw_pcie_link_up(struct dw_pcie *pci) +{ + if (pci->ops && pci->ops->link_up) + return pci->ops->link_up(pci); + + return dw_pcie_link_up_debug_check(pci); +} EXPORT_SYMBOL_GPL(dw_pcie_link_up); void dw_pcie_upconfig_setup(struct dw_pcie *pci) diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 419932488280..2ce61709b58c 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -618,6 +618,7 @@ int dw_pcie_write(void __iomem *addr, int size, u32 val); u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32 reg, size_t size); void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val); void dw_pcie_write_dbi2(struct dw_pcie *pci, u32 reg, size_t size, u32 val); +bool dw_pcie_link_up_debug_check(struct dw_pcie *pci); bool dw_pcie_link_up(struct dw_pcie *pci); void dw_pcie_upconfig_setup(struct dw_pcie *pci); int dw_pcie_wait_for_link(struct dw_pcie *pci); -- 2.54.0