From: Ravi Bangoria <ravi.bangoria@amd.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
"Jim Mattson" <jmattson@google.com>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>,
Jayapal Ashwin Nair <janair@amd.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>, <x86@kernel.org>,
<linux-perf-users@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
"Santosh Shukla" <santosh.shukla@amd.com>,
Ananth Narayan <ananth.narayan@amd.com>,
Sandipan Das <sandipan.das@amd.com>,
Manali Shukla <manali.shukla@amd.com>
Subject: [PATCH 2/3] perf/amd/ibs: Fix kernel address leak via REGS_USER
Date: Thu, 15 Oct 2026 06:04:29 +0000 [thread overview]
Message-ID: <20261015060430.5877-3-ravi.bangoria@amd.com> (raw)
In-Reply-To: <20261015060430.5877-1-ravi.bangoria@amd.com>
IBS hardware captures a sample and raises an NMI. Since the NMI can be
delivered with a delay, a privilege change may occur between sample
capture and NMI delivery. Because IBS only provides the sample RIP, the
kernel records GPRs from the NMI pt_regs, which may reflect kernel mode
if a privilege switch occurred in the interim. This can leak kernel
addresses to unprivileged users through PERF_SAMPLE_REGS_USER.
Fix this by discarding samples where the NMI arrives in kernel mode and
the user has set exclude_kernel.
Reported-by: Jayapal Ashwin Nair <janair@amd.com>
Fixes: d29e744c7167 ("perf/x86: Relax privilege filter restriction on AMD IBS")
Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
---
arch/x86/events/amd/ibs.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index bfb51f8e184f..3cb46c775eaa 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -1373,12 +1373,15 @@ static bool perf_ibs_is_kernel_br_target(struct perf_event *event,
}
static bool perf_ibs_discard_sample(struct perf_ibs *perf_ibs, struct perf_event *event,
- struct pt_regs *regs, struct perf_ibs_data *ibs_data,
- int br_target_idx)
+ struct pt_regs *regs, struct pt_regs *iregs,
+ struct perf_ibs_data *ibs_data, int br_target_idx)
{
if (perf_exclude_event(event, regs))
return true;
+ if (perf_exclude_event(event, iregs))
+ return true;
+
if (perf_ibs != &perf_ibs_op || !event->attr.exclude_kernel)
return false;
@@ -1529,7 +1532,7 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
if (((ibs_caps & IBS_CAPS_BIT63_FILTER) ||
(event->attr.config2 & IBS_SW_FILTER_MASK)) &&
- perf_ibs_discard_sample(perf_ibs, event, ®s, &ibs_data, br_target_idx)) {
+ perf_ibs_discard_sample(perf_ibs, event, ®s, iregs, &ibs_data, br_target_idx)) {
throttle = perf_event_account_interrupt(event);
goto out;
}
--
2.55.0
next prev parent reply other threads:[~2026-10-15 6:05 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-15 6:04 [PATCH 0/3] perf/amd/ibs: Assorted fixes Ravi Bangoria
2026-10-15 6:04 ` [PATCH 1/3] perf/amd/ibs: Reset CPU0 IBS state on syscore resume Ravi Bangoria
2026-10-15 20:01 ` Jim Mattson
2026-10-15 6:04 ` Ravi Bangoria [this message]
2026-10-15 6:04 ` [PATCH 3/3] perf/amd/ibs: Simplify event state handling with IBS_CAPS_DIS Ravi Bangoria
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