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The hypervisor's own commands, such as TLB invalidations, go through smmu_send_cmd(), which queues the command followed by a CMD_SYNC and waits for completion. Filtered host commands are copied into the shadow queue with smmu_add_cmd_raw(). Polling is bounded by a 1 ms timeout measured with the architected counter, and sleeps in WFE when the SMMU supports SEV. Split queue_space() out of queue_has_space(), as the emulation will check the space in the host's queue. Signed-off-by: Mostafa Saleh --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 14 ++- .../arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.c | 119 ++++++++++++++++++ 2 files changed, 127 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index d07fca3d1cf5..bc2e7e10200a 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -1287,19 +1287,21 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu, bool arm_smmu_erratum_repeat_tlbi_cfgi(void); /* Queue and STE functions shared between kernel and hyp. */ -static inline bool queue_has_space(struct arm_smmu_ll_queue *q, u32 n) +static inline u32 queue_space(struct arm_smmu_ll_queue *q) { - u32 space, prod, cons; + u32 prod, cons; prod = Q_IDX(q, q->prod); cons = Q_IDX(q, q->cons); if (Q_WRP(q, q->prod) == Q_WRP(q, q->cons)) - space = (1 << q->max_n_shift) - (prod - cons); - else - space = cons - prod; + return (1 << q->max_n_shift) - (prod - cons); + return cons - prod; +} - return space >= n; +static inline bool queue_has_space(struct arm_smmu_ll_queue *q, u32 n) +{ + return queue_space(q) >= n; } static inline bool queue_full(struct arm_smmu_ll_queue *q) diff --git a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.c b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.c index 02e7c6175832..c9fc21e405e7 100644 --- a/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.c +++ b/drivers/iommu/arm/arm-smmu-v3/pkvm/arm-smmu-v3-hyp.c @@ -25,6 +25,42 @@ struct hyp_arm_smmu_v3_device *kvm_hyp_arm_smmu_v3_smmus; #define cmdq_size(cmdq) ((1UL << ((cmdq)->llq.max_n_shift)) * CMDQ_ENT_DWORDS * 8) +static u32 timer_freq; + +static inline u64 hyp_clock_ns(void) +{ + return mul_u64_u32_div(__arch_counter_get_cntvct(), NSEC_PER_SEC, timer_freq); +} + +#define ARM_SMMU_EL2_POLL_TIMEOUT_US 1000 +/* + * Wait until @__cond is true. With @__use_wfe, sleep in WFE between polls: + * interrupts are masked at EL2, so only the SMMU's SEV or the timer event + * stream wakes the CPU, and the timeout is only checked once awake. + * Return 0 on success, or -ETIMEDOUT. + */ +#define smmu_wait(__use_wfe, __cond) \ +({ \ + int __ret = 0; \ + u64 __start = hyp_clock_ns(); \ + u64 __timeout = ARM_SMMU_EL2_POLL_TIMEOUT_US * NSEC_PER_USEC; \ + \ + while (!(__cond)) { \ + if (__use_wfe) { \ + wfe(); \ + } else { \ + cpu_relax(); \ + } \ + if ((hyp_clock_ns() - __start) >= __timeout) { \ + if (__cond) \ + break; \ + __ret = -ETIMEDOUT; \ + break; \ + } \ + } \ + __ret; \ +}) + static bool is_cmdq_enabled(struct hyp_arm_smmu_v3_device *smmu) { return FIELD_GET(CR0_CMDQEN, smmu->cr0); @@ -77,6 +113,85 @@ static int smmu_unshare_pages(phys_addr_t addr, size_t size) return 0; } +__maybe_unused +static bool smmu_cmdq_has_space(struct arm_smmu_queue *cmdq, u32 n) +{ + struct arm_smmu_ll_queue *llq = &cmdq->llq; + + WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg)); + return queue_has_space(llq, n); +} + +static bool smmu_cmdq_full(struct arm_smmu_queue *cmdq) +{ + struct arm_smmu_ll_queue *llq = &cmdq->llq; + + WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg)); + return queue_full(llq); +} + +static bool smmu_cmdq_empty(struct arm_smmu_queue *cmdq) +{ + struct arm_smmu_ll_queue *llq = &cmdq->llq; + + WRITE_ONCE(llq->cons, readl_relaxed(cmdq->cons_reg)); + return queue_empty(llq); +} + +static void smmu_add_cmd_raw(struct hyp_arm_smmu_v3_device *smmu, + u64 *cmd) +{ + struct arm_smmu_queue *q = &smmu->cmdq; + struct arm_smmu_ll_queue *llq = &q->llq; + + queue_write(Q_ENT(q, llq->prod), cmd, CMDQ_ENT_DWORDS); + llq->prod = queue_inc_prod_n(llq, 1); +} + +static int smmu_add_cmd(struct hyp_arm_smmu_v3_device *smmu, + struct arm_smmu_cmd *cmd) +{ + int ret; + + hyp_assert_lock_held(&smmu->hw_lock); + ret = smmu_wait(smmu->features & ARM_SMMU_FEAT_SEV, + !smmu_cmdq_full(&smmu->cmdq)); + if (ret) + return ret; + + smmu_add_cmd_raw(smmu, cmd->data); + writel(smmu->cmdq.llq.prod, smmu->cmdq.prod_reg); + return 0; +} + +static int smmu_sync_cmd(struct hyp_arm_smmu_v3_device *smmu) +{ + int ret; + struct arm_smmu_cmd cmd; + + hyp_assert_lock_held(&smmu->hw_lock); + cmd = arm_smmu_make_cmd_sync(CMDQ_SYNC_0_CS_SEV, 0); + ret = smmu_add_cmd(smmu, &cmd); + if (ret) + return ret; + + return smmu_wait(false, smmu_cmdq_empty(&smmu->cmdq)); +} + +__maybe_unused +static int smmu_send_cmd(struct hyp_arm_smmu_v3_device *smmu, + struct arm_smmu_cmd *cmd) +{ + int ret; + + hyp_assert_lock_held(&smmu->hw_lock); + ret = smmu_add_cmd(smmu, cmd); + if (ret) + return ret; + + return smmu_sync_cmd(smmu); +} + /* Put the device in a state that can be probed by the host driver. */ static void smmu_deinit_device(struct hyp_arm_smmu_v3_device *smmu) { @@ -202,6 +317,10 @@ static int smmu_init(void) if (!PAGE_ALIGNED(kvm_hyp_arm_smmu_v3_smmus)) return -EINVAL; + timer_freq = read_sysreg(cntfrq_el0); + if (!timer_freq || timer_freq > NSEC_PER_SEC) + return -EINVAL; + kvm_hyp_arm_smmu_v3_smmus = kern_hyp_va(kvm_hyp_arm_smmu_v3_smmus); pfn = hyp_virt_to_pfn(kvm_hyp_arm_smmu_v3_smmus); nr_pages = smmu_arr_size >> PAGE_SHIFT; -- 2.56.0.176.g3575e65682-goog