From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, tglx@kernel.org, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, peterz@infradead.org,
david.kaplan@amd.com, chang.seok.bae@intel.com
Subject: [PATCH v3 8/9] x86/nmi: Simplify offline microcode handler invocation
Date: Thu, 15 Oct 2026 21:14:25 +0000 [thread overview]
Message-ID: <20261015211426.49114-9-chang.seok.bae@intel.com> (raw)
In-Reply-To: <20261015211426.49114-1-chang.seok.bae@intel.com>
The microcode loader now uses the stop-machine facility for NMI-based
loading. The offline handler is the only remaining user of the microcode
NMI static key.
But the handler already has internal guarding. Offline CPU doesn't matter
how fast it handles anyway, so remove the static key. Instead, check the
build option.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
---
arch/x86/kernel/nmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/nmi.c b/arch/x86/kernel/nmi.c
index 066ac297873e..0227387fff54 100644
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@ -548,7 +548,7 @@ DEFINE_IDTENTRY_RAW(exc_nmi)
raw_atomic_long_inc(&nsp->idt_calls);
if (arch_cpu_is_offline(smp_processor_id())) {
- if (microcode_nmi_handler_enabled())
+ if (IS_ENABLED(CONFIG_MICROCODE_LATE_LOADING))
microcode_offline_nmi_handler();
return;
}
@@ -710,7 +710,7 @@ DEFINE_FREDENTRY_NMI(exc_nmi)
irqentry_state_t irq_state;
if (arch_cpu_is_offline(smp_processor_id())) {
- if (microcode_nmi_handler_enabled())
+ if (IS_ENABLED(CONFIG_MICROCODE_LATE_LOADING))
microcode_offline_nmi_handler();
return;
}
--
2.53.0
next prev parent reply other threads:[~2026-10-15 21:41 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-15 21:14 [PATCH v3 0/9] x86/microcode: Refactor NMI-based rendezvous mechanism to stop-machine Chang S. Bae
2026-10-15 21:14 ` [PATCH v3 1/9] stop_machine: Refactor multi-CPU stop glue code Chang S. Bae
2026-10-15 21:14 ` [PATCH v3 2/9] stop_machine: Add NMI-based execution path Chang S. Bae
2026-10-15 21:14 ` [PATCH v3 3/9] stop_machine: Introduce stop_machine_nmi_cpuslocked() Chang S. Bae
2026-10-16 7:15 ` kernel test robot
2026-10-15 21:14 ` [PATCH v3 4/9] x86/apic: Implement self-NMI support Chang S. Bae
2026-10-15 21:14 ` [PATCH v3 5/9] x86/nmi: Support NMI stop-machine handler Chang S. Bae
2026-10-15 21:14 ` [PATCH v3 6/9] x86/microcode: Distinguish NMI control path on stop-machine callback Chang S. Bae
2026-10-15 21:14 ` [PATCH v3 7/9] x86/microcode: Use stop-machine NMI facility Chang S. Bae
2026-10-15 21:14 ` Chang S. Bae [this message]
2026-10-15 21:14 ` [PATCH v3 9/9] x86/microcode: Remove microcode_nmi_handler_enable Chang S. Bae
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261015211426.49114-9-chang.seok.bae@intel.com \
--to=chang.seok.bae@intel.com \
--cc=bp@alien8.de \
--cc=dave.hansen@linux.intel.com \
--cc=david.kaplan@amd.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=tglx@kernel.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®