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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-360819be413sm2256698eec.13.2026.10.15.20.22.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Oct 2026 20:22:29 -0700 (PDT) From: Aaradhana Sahu Date: Fri, 16 Oct 2026 08:51:46 +0530 Subject: [PATCH ath-next v2 09/17] wifi: ath12k: add support for unified data-region memory allocation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261016-mpp-bringup-v2-9-f510c33bfcf5@oss.qualcomm.com> References: <20261016-mpp-bringup-v2-0-f510c33bfcf5@oss.qualcomm.com> In-Reply-To: <20261016-mpp-bringup-v2-0-f510c33bfcf5@oss.qualcomm.com> To: Johannes Berg , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jeff Johnson Cc: linux-wireless@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ath12k@lists.infradead.org, Aaradhana Sahu X-Mailer: b4 0.15.2 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE2MDAxMiBTYWx0ZWRfX4tdWRF0dXMgs KeFICD67DXWu9FyPT8ry/QOCqZh5oQuCWdSZINXAinaovktSIQfNqHJ2xyGjqe8wJ+RMQfP80Bx bbJzftrz0q6CjaXudWRgdWXj/gE+tgo= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE2MDAxMiBTYWx0ZWRfXxN0ap/uMmX48 A6FoGZv/3s/GvViz89noY4MFg4+jvce39DlG0vvCtI7c+UvEXrDFGMzpEhGym4sunzVQrYkGWAf tZuI+7Bo0Xwu61k0o7BykjJEcjeRDOfLSM/3luto8Bchxm6/QuQKHx+BGNk353qDEFsI2I5hyK3 5BDXtGLiRCsx6E/Sl6obFvm3y/3KbmMaGgA4EUE+x5wXp+ZyaunHJv8JL07vijcRtkkuqbZ74UX oUSQicX/7Kn2kTjjWUMOUm2qojl+EXifv+c1LYF3cLS5d1NOhEAaWfNsiOqjKaN23bFQHHKCpeD Z9Lx22akKq1wlEfsCsIVFYHMlc49w1O8cjlXg7WTZr/qQX/XCxy5pfMNQ30d+A4I2RBRDLPQj9Y BDKf4IqTEYxbzHEPw2uGrzKzyT7B6QbI3WaEMvUEENZiv/TqietMmeAOihBeESCMtAkjeYMdFzV 32MS+VS07emtVFgnrJQ== X-Authority-Analysis: v=2.4 cv=P4yvFSAu c=1 sm=1 tr=0 ts=6ad19876 cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=EUspDBNiAAAA:8 a=iclRB15sEzZHjfpwsoEA:9 a=QEXdDO2ut3YA:10 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-ORIG-GUID: V3aeumTT1HW_pwAR5su3JfZzUE-CDpJI X-Proofpoint-GUID: V3aeumTT1HW_pwAR5su3JfZzUE-CDpJI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 impostorscore=0 bulkscore=0 priorityscore=1501 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610160012 Add support for devices such as QCN6432 that provide the M3 and calibration memory through a unified data-region reserved-memory node. The QCN6432 device tree continues to provide separate q6-region and mlo-global-mem regions, while the memory types mapped to M3 and calibration memory are allocated sequentially from data-region. Track the allocated space using an offset and allocate each required memory chunk from the unified region. If the data-region lookup does not return a reserved-memory region, fall back to the existing per-memory-type allocation scheme using the named memory regions such as q6-region, m3-dump, and q6-caldb. Introduce a helper ath12k_qmi_map_target_mem() to initialize and map QMI target memory chunks. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Tested-on: IPQ5332 hw1.0 AHB WLAN.WBE.1.6-01322-QCAHKSWPL_SILICONZ-1 Tested-on: QCN6432 hw1.0 AHB WLAN.WBE.1.6-01322-QCAHKSWPL_SILICONZ-1 Signed-off-by: Aaradhana Sahu --- drivers/net/wireless/ath/ath12k/qmi.c | 83 +++++++++++++++++++++++++++++------ 1 file changed, 70 insertions(+), 13 deletions(-) diff --git a/drivers/net/wireless/ath/ath12k/qmi.c b/drivers/net/wireless/ath/ath12k/qmi.c index 817bd820623d..cc488cfe2b2f 100644 --- a/drivers/net/wireless/ath/ath12k/qmi.c +++ b/drivers/net/wireless/ath/ath12k/qmi.c @@ -2842,6 +2842,26 @@ static const char *ath12k_qmi_get_mem_reg_name(int mem_type) } } +static int ath12k_qmi_map_target_mem(struct ath12k_base *ab, int idx, + phys_addr_t paddr, u32 size, u32 type) +{ + ab->qmi.target_mem[idx].paddr = paddr; + + if (paddr) { + ab->qmi.target_mem[idx].v.ioaddr = + ioremap(ab->qmi.target_mem[idx].paddr, size); + if (!ab->qmi.target_mem[idx].v.ioaddr) + return -EIO; + } else { + ab->qmi.target_mem[idx].v.ioaddr = NULL; + } + + ab->qmi.target_mem[idx].size = size; + ab->qmi.target_mem[idx].type = type; + + return 0; +} + static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab) { struct device_node *np = ab->dev->of_node; @@ -2851,6 +2871,48 @@ static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab) const char *rname; int i, idx, ret; + ret = of_reserved_mem_region_to_resource_byname(np, "data-region", &res); + if (ret && ret != -ENODATA) + return ret; + + if (!ret) { + avail_rmem_size = resource_size(&res); + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) { + chunk = &ab->qmi.target_mem[i]; + + if (chunk->type == CALDB_MEM_REGION_TYPE) { + ret = ath12k_qmi_map_target_mem(ab, idx, 0, chunk->size, + chunk->type); + if (ret) + goto out; + + idx++; + continue; + } + + if (offset > avail_rmem_size || + avail_rmem_size - offset < chunk->size) { + ath12k_err(ab, "failed to assign mem type %u req size %u avail size %zu\n", + chunk->type, chunk->size, + offset > avail_rmem_size ? 0 : + avail_rmem_size - offset); + ret = -EINVAL; + goto out; + } + + ret = ath12k_qmi_map_target_mem(ab, idx, res.start + offset, + chunk->size, chunk->type); + if (ret) + goto out; + + offset += chunk->size; + idx++; + } + + ab->qmi.mem_seg_count = idx; + return 0; + } + for (i = 0, idx = 0; i < ab->qmi.mem_seg_count; i++) { chunk = &ab->qmi.target_mem[i]; if (chunk->type == CALDB_MEM_REGION_TYPE) { @@ -2860,10 +2922,11 @@ static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab) * Once cold boot calibration is enabled add support to * assign reserved memory from DT. */ - ab->qmi.target_mem[idx].paddr = 0; - ab->qmi.target_mem[idx].v.ioaddr = NULL; - ab->qmi.target_mem[idx].size = chunk->size; - ab->qmi.target_mem[idx].type = chunk->type; + ret = ath12k_qmi_map_target_mem(ab, idx, 0, chunk->size, + chunk->type); + if (ret) + goto out; + idx++; continue; } @@ -2904,16 +2967,10 @@ static int ath12k_qmi_assign_target_mem_chunk(struct ath12k_base *ab) goto out; } - ab->qmi.target_mem[idx].paddr = res.start; - ab->qmi.target_mem[idx].v.ioaddr = ioremap(ab->qmi.target_mem[idx].paddr, - chunk->size); - if (!ab->qmi.target_mem[idx].v.ioaddr) { - ret = -EIO; + ret = ath12k_qmi_map_target_mem(ab, idx, res.start, chunk->size, + chunk->type); + if (ret) goto out; - } - - ab->qmi.target_mem[idx].size = chunk->size; - ab->qmi.target_mem[idx].type = chunk->type; idx++; } ab->qmi.mem_seg_count = idx; -- 2.34.1