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Fri, 16 Oct 2026 05:57:35 -0700 (PDT) X-Received: by 2002:a05:7022:29b:b0:15a:9834:73f2 with SMTP id a92af1059eb24-16a5fe7c16fmr32012229c88.38.1792155454681; Fri, 16 Oct 2026 05:57:34 -0700 (PDT) Received: from hu-msarkar-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1831996071csm6188285c88.9.2026.10.16.05.57.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Oct 2026 05:57:34 -0700 (PDT) From: Mrinmay Sarkar Date: Fri, 16 Oct 2026 18:27:20 +0530 Subject: [PATCH 2/2] PCI: qcom: Reinitialize MSI on resume for firmware-managed controllers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20261016-pcie-controller-reset-v1-2-51779736cf12@oss.qualcomm.com> References: <20261016-pcie-controller-reset-v1-0-51779736cf12@oss.qualcomm.com> In-Reply-To: <20261016-pcie-controller-reset-v1-0-51779736cf12@oss.qualcomm.com> To: Manivannan Sadhasivam , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Rama Krishna , Nitesh Gupta , Ayiluri Naga Rashmi , Krishna Chaitanya Chundru , Shazad Hussain , Mrinmay Sarkar X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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While firmware reinitializes the controller through the power domain framework during resume, the DesignWare MSI registers are not preserved across the power cycle and must be reprogrammed by the driver. Retrieve the DesignWare PCIe context and reinitialize MSI state during the resume path for firmware-managed controllers to restore MSI functionality after resume. Signed-off-by: Mrinmay Sarkar --- drivers/pci/controller/dwc/pcie-qcom.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 744455ae90d4..116622843d2a 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -2324,6 +2324,7 @@ static int qcom_pcie_probe(struct platform_device *pdev) bridge->ops = (struct pci_ops *)&pci_qcom_ecam_ops.pci_ops; bridge->msi_domain = true; bridge->reset_root_port = qcom_pcie_fw_reset_root_port; + dev_set_drvdata(dev, cfg); ret = pci_host_probe(bridge); if (ret) @@ -2551,8 +2552,14 @@ static int qcom_pcie_resume_noirq(struct device *dev) int ret; const struct qcom_pcie_cfg *pcie_cfg = of_device_get_match_data(dev); - if (pcie_cfg && pcie_cfg->firmware_managed) + if (pcie_cfg && pcie_cfg->firmware_managed) { + struct pci_config_window *cfg = dev_get_drvdata(dev); + + if (cfg && cfg->priv) + dw_pcie_msi_init(cfg->priv); + return 0; + } pcie = dev_get_drvdata(dev); if (!pcie) -- 2.43.0