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Fri, 16 Oct 2026 05:41:02 -0700 (PDT) From: Joonhoe Kim <26rote@gmail.com> To: Dmitry Baryshkov Cc: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 09/10] drm/msm/dpu: only reassign resources when the encoder is reprogrammed Date: Fri, 16 Oct 2026 21:40:55 +0900 Message-ID: <20261016124055.1232-1-26rote@gmail.com> X-Mailer: git-send-email 2.55.0.windows.5 In-Reply-To: <20261003-fd-kms-fix-smmu-v4-9-2a44d4d8ac77@oss.qualcomm.com> References: <20261003-fd-kms-fix-smmu-v4-0-2a44d4d8ac77@oss.qualcomm.com> <20261003-fd-kms-fix-smmu-v4-9-2a44d4d8ac77@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit On Sat, 03 Oct 2026 03:30:24 +0300, Dmitry Baryshkov wrote: > Reassign only when the encoder is reprogrammed too. Enabling colour > management still needs a modeset, as that is when DSPPs join the > topology, so ask for one in dpu_crtc_check_mode_changed() and only there. Tested with 7/10 and this patch on v7.3-rc4, with out-of-tree support for a Lenovo Legion Tab Y700 Gen 5 (SM8850, bonded DSI). A compositor sets the CRTC CTM through the legacy property ioctl: NULL -> blob, a series of blob -> blob updates, then back to NULL. Over two such rounds, counting msm_dsi_host_power_off/on with kprobes: without the series every NULL <-> blob change was a full modeset, four in total; with it only the first NULL -> blob after boot was, and the blob -> blob updates and the clears were plain commits. That tree also carries out-of-tree SPR support, so for the test dpu_crtc_needs_dspp() also returned true when SPR is enabled. Tested-by: Joonhoe Kim <26rote@gmail.com> W=1 warns about the kernel-doc of dpu_crtc_check_mode_changed(): the new helpers sit between that comment and the function. A CRTC now keeps its DSPPs after the CTM is cleared, until its next modeset, so on chips with a single DSPP (SC7180, SC7280, ...) another CRTC asking for a CTM fails dpu_rm_reserve() in the meantime. Maybe worth a line in the commit message. Thanks, Joonhoe Kim