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Fri, 16 Oct 2026 09:21:35 -0700 From: To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , Subject: [PATCH v6 18/31] vfio/cxl: Add the vfio-cxl provider module skeleton Date: Fri, 16 Oct 2026 21:48:25 +0530 Message-ID: <20261016161839.2765592-19-mhonap@nvidia.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261016161839.2765592-1-mhonap@nvidia.com> References: <20261016161839.2765592-1-mhonap@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail201.nvidia.com (10.129.68.8) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH01EPF000BE949:EE_|SA5PPFB29794CA1:EE_ X-MS-Office365-Filtering-Correlation-Id: c858e635-91e0-49d2-1313-08df2ba1a044 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|23010399003|1800799024|7416014|18002099003|10067099003|22082099003|921020|11063799006|261009223027099003|56012099006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: QsHVp1BAdLrCqHm8k9cEqZtIotavSgCDZCDqAlZjJhjNPtN2IBOnjK+f0yQ0uyrRkR7AY9UbKtDlRuaHn5PEVXgnr+kEEg4jmnYGbSy9UGR8ekWws3gNH9RCD7SB6wwojZdBxjKSNM7IC3AR2eRH996Zcg4kJe3ASMnrr5AeuQsnx7mlj0I9wj4xcfeQJTUiet2QJ/Kf5gdjn8RqARNf0RugulPXKIqECRMsr5U+SOIq66d7P/HQLGllXr10dFBeB9pfS8VLcbzLB1DXFSD5yXz7iYHZj3za65KO/CiNDxwkbrpbs/PKKeVrnafHz9x9AKnxuZ8CKfPydPdJQcGf9INPBwwjPVY6L94bgP9kFJCBuyWh2r1qHX8j6t/GM7CxhavjvRA+v/U9k0iaSUDKucFplAgrzienr/T+MvGWqi+KAq8IP4y9lufYoi75bblz X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Oct 2026 16:22:08.6565 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c858e635-91e0-49d2-1313-08df2ba1a044 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH01EPF000BE949.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA5PPFB29794CA1 From: Manish Honap Add the vfio-cxl module that vfio-pci-core loads on demand for a CXL Type-2 device, registering its callbacks at module_init. Its reset op runs the PCI core's reset methods until vfio-cxl serves the device memory. vfio-cxl is a feature of vfio-pci-core rather than a variant driver, so its Kconfig sources above the variant drivers and its objects link right after vfio-pci-core while still being loaded on demand: request_module("vfio-cxl") finds it by module name. Assisted-by: LLM Signed-off-by: Manish Honap --- MAINTAINERS | 7 +++ drivers/vfio/pci/Kconfig | 2 + drivers/vfio/pci/Makefile | 2 + drivers/vfio/pci/cxl/Kconfig | 11 ++++ drivers/vfio/pci/cxl/Makefile | 3 + drivers/vfio/pci/cxl/vfio_cxl_core.c | 82 ++++++++++++++++++++++++++++ 6 files changed, 107 insertions(+) create mode 100644 drivers/vfio/pci/cxl/Kconfig create mode 100644 drivers/vfio/pci/cxl/Makefile create mode 100644 drivers/vfio/pci/cxl/vfio_cxl_core.c diff --git a/MAINTAINERS b/MAINTAINERS index c3aef3dce68c..8ac0a91ce647 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -28636,6 +28636,13 @@ L: kvm@vger.kernel.org S: Maintained F: drivers/vfio/cdx/* +VFIO CXL DRIVER +M: Manish Honap +L: kvm@vger.kernel.org +L: linux-cxl@vger.kernel.org +S: Supported +F: drivers/vfio/pci/cxl/ + VFIO DRIVER M: Alex Williamson L: kvm@vger.kernel.org diff --git a/drivers/vfio/pci/Kconfig b/drivers/vfio/pci/Kconfig index 296bf01e185e..4cd6acd36053 100644 --- a/drivers/vfio/pci/Kconfig +++ b/drivers/vfio/pci/Kconfig @@ -58,6 +58,8 @@ config VFIO_PCI_ZDEV_KVM config VFIO_PCI_DMABUF def_bool y if VFIO_PCI_CORE && PCI_P2PDMA && DMA_SHARED_BUFFER +source "drivers/vfio/pci/cxl/Kconfig" + source "drivers/vfio/pci/mlx5/Kconfig" source "drivers/vfio/pci/ism/Kconfig" diff --git a/drivers/vfio/pci/Makefile b/drivers/vfio/pci/Makefile index 6138f1bf241d..b65117d8d463 100644 --- a/drivers/vfio/pci/Makefile +++ b/drivers/vfio/pci/Makefile @@ -5,6 +5,8 @@ vfio-pci-core-$(CONFIG_VFIO_PCI_ZDEV_KVM) += vfio_pci_zdev.o vfio-pci-core-$(CONFIG_VFIO_PCI_DMABUF) += vfio_pci_dmabuf.o obj-$(CONFIG_VFIO_PCI_CORE) += vfio-pci-core.o +obj-$(CONFIG_VFIO_CXL) += cxl/ + vfio-pci-y := vfio_pci.o vfio-pci-$(CONFIG_VFIO_PCI_IGD) += vfio_pci_igd.o obj-$(CONFIG_VFIO_PCI) += vfio-pci.o diff --git a/drivers/vfio/pci/cxl/Kconfig b/drivers/vfio/pci/cxl/Kconfig new file mode 100644 index 000000000000..1392fa4ed15d --- /dev/null +++ b/drivers/vfio/pci/cxl/Kconfig @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-2.0-only +config VFIO_CXL + tristate "VFIO support for CXL Type-2 devices" + depends on CXL_BUS && CXL_MEM + select VFIO_PCI_CORE + help + Add CXL HDM handling to vfio-pci so a CXL Type-2 device, such as a + CXL-attached accelerator, can be assigned to a virtual machine. + vfio-pci loads this module on demand when it binds a CXL device. + + If you don't know what to do here, say N. diff --git a/drivers/vfio/pci/cxl/Makefile b/drivers/vfio/pci/cxl/Makefile new file mode 100644 index 000000000000..8501bf626108 --- /dev/null +++ b/drivers/vfio/pci/cxl/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_VFIO_CXL) += vfio-cxl.o +vfio-cxl-y := vfio_cxl_core.o diff --git a/drivers/vfio/pci/cxl/vfio_cxl_core.c b/drivers/vfio/pci/cxl/vfio_cxl_core.c new file mode 100644 index 000000000000..ee49d68d689c --- /dev/null +++ b/drivers/vfio/pci/cxl/vfio_cxl_core.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * VFIO support for CXL Type-2 devices. + * + * Copyright (c) 2026 NVIDIA Corporation & Affiliates + */ + +#include +#include +#include + +static int vfio_cxl_init_device(struct vfio_pci_core_device *vdev) +{ + return 0; +} + +static void vfio_cxl_release_device(struct vfio_pci_core_device *vdev) +{ +} + +static int vfio_cxl_open_device(struct vfio_pci_core_device *vdev) +{ + return 0; +} + +static void vfio_cxl_close_device(struct vfio_pci_core_device *vdev) +{ +} + +static void vfio_cxl_reset_prepare(struct vfio_pci_core_device *vdev) +{ +} + +static int vfio_cxl_reset_done(struct vfio_pci_core_device *vdev) +{ + return 0; +} + +/* + * Until vfio-cxl serves the device memory, reset through the PCI core's + * reset methods, which run CXL Reset ahead of FLR. Restore the PCI state + * here rather than through pci_reset_function_locked(): its reset_prepare + * and reset_done callbacks take memory_lock, which the caller already holds. + * The caller has saved the state, or on close loaded the open-time copy. + */ +static int vfio_cxl_reset(struct vfio_pci_core_device *vdev) +{ + struct pci_dev *pdev = vdev->pdev; + int ret; + + ret = __pci_reset_function_locked(pdev); + pci_restore_state(pdev); + + return ret; +} + +static const struct vfio_cxl_ops vfio_cxl_ops = { + .init = vfio_cxl_init_device, + .release = vfio_cxl_release_device, + .open_device = vfio_cxl_open_device, + .close_device = vfio_cxl_close_device, + .reset_prepare = vfio_cxl_reset_prepare, + .reset_done = vfio_cxl_reset_done, + .reset = vfio_cxl_reset, + .owner = THIS_MODULE, +}; + +static int __init vfio_cxl_init(void) +{ + return vfio_pci_core_register_cxl_ops(&vfio_cxl_ops); +} + +static void __exit vfio_cxl_exit(void) +{ + vfio_pci_core_unregister_cxl_ops(&vfio_cxl_ops); +} + +module_init(vfio_cxl_init); +module_exit(vfio_cxl_exit); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("VFIO support for CXL Type-2 devices"); -- 2.53.0