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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-183190aa7bbsm8556183c88.5.2026.10.16.16.55.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Oct 2026 16:55:03 -0700 (PDT) From: Anusha Arun Nandi To: bod@kernel.org, vkoul@kernel.org, kishon@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, neil.armstrong@linaro.org, mani@kernel.org Cc: gjorgji.rosikopulos@oss.qualcomm.com, hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com, jigarkumar.zala@oss.qualcomm.com, loic.poulain@oss.qualcomm.com, vladimir.zapolskiy@linaro.org, linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/7] phy: qcom-mipi-csi2: Add D-PHY support for sa8775p, qcs8300 and sc7280 Date: Fri, 16 Oct 2026 16:54:55 -0700 Message-Id: <20261016235502.2274268-1-anusha.nandi@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: JPe_f2JSYDg8RbOiQ1HgdImsEGtESEAr X-Authority-Analysis: v=2.4 cv=COa/zhrD c=1 sm=1 tr=0 ts=6ad2b959 cx=c_pps a=wEP8DlPgTf/vqF+yE6f9lg==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=3gKqbpTmytvcg6W9XpQA:9 a=bBxd6f-gb0O0v-kibOvt:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: JPe_f2JSYDg8RbOiQ1HgdImsEGtESEAr X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE2MDA5NSBTYWx0ZWRfX52QGGfgRuC93 GuPRwYhoDH4unOPdGxJ8US2J2IB9klgPmQNrJvreOIZjSrblytl0nEWmsz4coneNAOrglUIrkZV C0P5jm9U9Kr5Gxe7oFlyn8C2Wu3f93GbGEEHBGn5hJBlNdHa7VhBT/1JAZjTbv9CN29WoimL3TH FQKU8+Y2/B4INHRp/GkB8hxo1rwAptq8x0kAK9xTdH/aJS+1aIZpiz1ZYME9SBT/pVwBzYl4HSB hMlD4bVHUHCLl0i2N7JZNwvxvFdPJlinjrNaL8cPknuOSuLgNuMwry+STfDnt66klT7/QhvUOEH S/PJFPASnqTzNr5KI4EGrCn/v6QNX9BK2Y1np4Gk+PnlI9RZcU93a62JPW1yu1zRcjtW6Q5iMSN JTSpsMus3ucYH1dYdGCf0AKRQZPmnQ5P8XGZJcUb7CC5a8mpmjueyTL6nkN4mVZ7Avani1sMpLi 4CmlVYD2g5pAu7bLIRQ== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE2MDA5NSBTYWx0ZWRfX4AzPy90yyyEs cHY+33F7Z2pDd9S6reETCUqo8bu0bsb50ATgAt4VivqBzmUNfpC1Xz7eqerT2O5uEfaE6HPG64R Bo473K12Fx2iUJUiqUuGia/2Eokhw9c= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-16_04,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 malwarescore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 phishscore=0 spamscore=0 bulkscore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610160095 This series extends the generic Qualcomm MIPI CSI2 PHY driver (drivers/phy/qualcomm/phy-qcom-mipi-csi2-*) with three additional CSIPHY variants: SA8775P, QCS8300 and SC7280. The driver currently only supports x1e80100; these SoCs let CAMSS consume the CSIPHY through the common PHY framework instead of the CSIPHY logic embedded in the legacy in-tree CAMSS driver. All three targets share one hardware trait that x1e80100 does not: each has a single CSIPHY power-domain ("top", the Titan Top GDSC) instead of three. Patch 1 fixes a latent bug this exposes: for a single-power-domain device, the generic platform-bus code auto-attaches the domain before probe() runs, so the driver's own unconditional devm_pm_domain_attach_list() call fails with -EEXIST. x1e80100 never hit this because auto-attach only applies when there is exactly one power-domain phandle. This fix is a prerequisite for every patch that follows and is kept first per bisectability. The remaining patches add each SoC as its own variant, per the usual split of core/generic changes from SoC-specific data: - Patches 2-3 add the devicetree binding for SA8775P, then extend it to QCS8300, which reuses the exact same CSIPHY (same D-PHY register layout, common-control offset and clock set) as a second compatible string in one schema rather than a duplicate file. - Patch 4 adds the SA8775P driver-side soc_cfg (register init sequence ported from the legacy camss-csiphy-3ph-1-0.c table, clocks and power-domain), and generalises the previously-hardcoded "timer"/ "core" clock-name string literals in the probe path into per-SoC soc_cfg fields so other SoCs can declare their own. - Patch 5 binds QCS8300 to the same soc_cfg added in patch 4 -- no new register data or power-domain wiring is needed. - Patches 6-7 repeat the binding + driver split for SC7280, which has its own register set and only two clocks. Tested on sa8775p, qcs8300 and sc7280. Depends-on: https://lore.kernel.org/all/20260917-x1e-csi2-phy-v18-0-6515b5255fa9@linaro.org/ Depends-on: https://lore.kernel.org/all/20260918-b4-linux-next-25-03-13-dtsi-x1e80100-camss-v20-0-dc244e124e71@linaro.org/ Anusha Arun Nandi (7): phy: qcom-mipi-csi2: fix -EEXIST probe failure on single power-domain SoCs dt-bindings: phy: qcom: Add qcom,sa8775p-csi2-phy schema dt-bindings: phy: qcom: Add qcs8300 to the CSI2 PHY schema phy: qcom-mipi-csi2: Add sa8775p D-PHY support phy: qcom-mipi-csi2: Add qcs8300 CSI2 PHY support dt-bindings: phy: qcom: Add qcom,sc7280-csi2-phy schema phy: qcom-mipi-csi2: Add sc7280 D-PHY provider .../bindings/phy/qcom,sa8775p-csi2-phy.yaml | 175 ++++++++++++ .../bindings/phy/qcom,sc7280-csi2-phy.yaml | 169 ++++++++++++ .../qualcomm/phy-qcom-mipi-csi2-3ph-dphy.c | 251 ++++++++++++++++++ .../phy/qualcomm/phy-qcom-mipi-csi2-core.c | 31 ++- drivers/phy/qualcomm/phy-qcom-mipi-csi2.h | 5 + 5 files changed, 622 insertions(+), 9 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/qcom,sa8775p-csi2-phy.yaml create mode 100644 Documentation/devicetree/bindings/phy/qcom,sc7280-csi2-phy.yaml -- base-commit: b38d06ad1e13c32970d58039c154f009b81a3368 change-id: 20250710-x1e-csi2-phy-f6434b651d3a base-commit: 617b69946d330ed334861a3cc2660966e8c14b2c change-id: 20250313-b4-linux-next-25-03-13-dtsi-x1e80100-camss-1506f74bbd3a Best regards, -- Anusha Arun Nandi -- 2.34.1