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[80.193.62.245]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48dfd4c5957sm10183948f8f.9.2026.10.17.03.12.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 17 Oct 2026 03:12:28 -0700 (PDT) From: George Neacsu To: Anusha Arun Nandi Cc: David Heidelberg , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bryan O'Donoghue , Vladimir Zapolskiy , Loic Poulain , Mauro Carvalho Chehab , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, gjorgji.rosikopulos@oss.qualcomm.com, jigarkumar.zala@oss.qualcomm.com, hariram.purushothaman@oss.qualcomm.com, akapatra@quicinc.com, Bryan O'Donoghue , linux-media@vger.kernel.org, krzysztof.kozlowski@oss.qualcomm.com, daniel@quora.org, konrad.dybcio@oss.qualcomm.com, christopher.obbard@linaro.org, alex.vinarskis@gmail.com Subject: Re: [PATCH 2/2] media: qcom: camss: account for C-PHY when calculating link frequency Date: Sat, 17 Oct 2026 11:12:27 +0100 Message-ID: <20261017101227.61271-1-geocausa@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20261017035221.3816464-3-anusha.nandi@oss.qualcomm.com> References: <20261017035221.3816464-1-anusha.nandi@oss.qualcomm.com> <20261017035221.3816464-3-anusha.nandi@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Anusha, I tested the CAMSS pieces on X1E80100 and found one extra receiver path that needs the C-PHY select. X1E80100 uses csid_ops_680, not the gen3 CSID path changed here. The C-PHY flag reaches struct csid_phy_config correctly, but camss-csid-680.c leaves CSI2_RX_CFG0.PHY_TYPE_SEL clear, so the front IMX681 stream is decoded as D-PHY and capture times out with a zero-byte buffer. The equivalent change for CSID 680 is just: val |= phy->cphy << CSI2_RX_CFG0_PHY_TYPE_SEL; before writing CSID_CSI2_RX_CFG0. With that line, the register reads back 0x01300000 on CSID1 and 3844x2640 RAW10 capture succeeds from the IMX681 over one C-PHY trio. The rear OV13858 still captures over four D-PHY lanes. I also ran a control with your posted CAMSS/qcom-mipi-csi2 module code, plus only the X1E PHY table and this CSID-680 select: both front and rear capture successfully. Would you prefer to fold the CSID-680 line into this patch? I have a clean follow-up commit ready if you would rather I send it separately. Thanks, George