From: Gopikishan Thawre <gopikishan.thawre@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Gopikishan Thawre <gopikishan.thawre@oss.qualcomm.com>,
Richard Cochran <richardcochran@gmail.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
Vishnu Saini <vishnu.saini@oss.qualcomm.com>,
Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com>,
Ajinkya Inchure <ainchure@qti.qualcomm.com>,
Anuj Tripathi <anuj.tripathi@oss.qualcomm.com>
Subject: [PATCH 3/3] arm64: dts: qcom: lemans: Add Draco EVK board
Date: Mon, 19 Oct 2026 15:57:34 +0530 [thread overview]
Message-ID: <20261019-lemans-draco-final-changes-bringup-v1-3-dcabe94f1074@oss.qualcomm.com> (raw)
In-Reply-To: <20261019-lemans-draco-final-changes-bringup-v1-0-dcabe94f1074@oss.qualcomm.com>
Add the device tree for the LeMans Draco EVK platform which combines
the LeMans Draco EVK SoM and Draco carrier board.
This device tree adds board-specific peripheral configuration on top
of the SoM, including:
- I2C GPIO expanders (TCA6416/PCA9534) on i2c2 and i2c18
- EEPROM with MAC address nvmem layout on i2c18
- Native DisplayPort output (DP0-DP3)
- Dual Ethernet (ethernet0/ethernet1) with HSGMII PHY over SerDes
- ST33HTPM TPM over SPI16
- AMC6821 fan controller on i2c4
Co-developed-by: Vishnu Saini <vishnu.saini@oss.qualcomm.com>
Signed-off-by: Vishnu Saini <vishnu.saini@oss.qualcomm.com>
Co-developed-by: Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com>
Signed-off-by: Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com>
Co-developed-by: Ajinkya Inchure <ainchure@qti.qualcomm.com>
Signed-off-by: Ajinkya Inchure <ainchure@qti.qualcomm.com>
Co-developed-by: Anuj Tripathi <anuj.tripathi@oss.qualcomm.com>
Signed-off-by: Anuj Tripathi <anuj.tripathi@oss.qualcomm.com>
Signed-off-by: Gopikishan Thawre <gopikishan.thawre@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/Makefile | 5 +
arch/arm64/boot/dts/qcom/lemans-draco-evk.dts | 543 ++++++++++++++++++++++++++
2 files changed, 548 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 4e714251d5e6..f1713d53af5f 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -50,6 +50,11 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq9650-rdp488.dtb
dtb-$(CONFIG_ARCH_QCOM) += kaanapali-mtp.dtb
dtb-$(CONFIG_ARCH_QCOM) += kaanapali-qrd.dtb
dtb-$(CONFIG_ARCH_QCOM) += lemans-evk.dtb
+dtb-$(CONFIG_ARCH_QCOM) += lemans-draco-evk.dtb
+
+lemans-draco-evk-el2-dtbs := lemans-draco-evk.dtb lemans-el2.dtbo
+
+dtb-$(CONFIG_ARCH_QCOM) += lemans-draco-evk-el2.dtb
lemans-evk-camera-csi1-imx577-dtbs := lemans-evk.dtb lemans-evk-camera-csi1-imx577.dtbo
lemans-evk-camera-dtbs := lemans-evk.dtb lemans-evk-camera.dtbo
diff --git a/arch/arm64/boot/dts/qcom/lemans-draco-evk.dts b/arch/arm64/boot/dts/qcom/lemans-draco-evk.dts
new file mode 100644
index 000000000000..5238157ad002
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/lemans-draco-evk.dts
@@ -0,0 +1,543 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+/dts-v1/;
+
+#include <dt-bindings/pwm/pwm.h>
+#include "lemans-draco-evk-som.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. Lemans Draco EVK";
+ compatible = "qcom,lemans-draco-evk", "qcom,qcs9100",
+ "qcom,sa8775p";
+ chassis-type = "embedded";
+
+ aliases {
+ ethernet0 = ðernet0;
+ ethernet1 = ðernet1;
+ };
+
+ dp0-connector {
+ compatible = "dp-connector";
+ label = "DP0";
+ type = "full-size";
+
+ dp-pwr-supply = <&vreg_dp0_pwr>;
+
+ port {
+ dp0_connector_in: endpoint {
+ remote-endpoint = <&mdss0_dp0_out>;
+ };
+ };
+ };
+
+ dp1-connector {
+ compatible = "dp-connector";
+ label = "DP1";
+ type = "full-size";
+
+ dp-pwr-supply = <&vreg_dp1_pwr>;
+
+ port {
+ dp1_connector_in: endpoint {
+ remote-endpoint = <&mdss0_dp1_out>;
+ };
+ };
+ };
+
+ dp2-connector {
+ compatible = "dp-connector";
+ label = "DP2";
+ type = "full-size";
+
+ dp-pwr-supply = <&vreg_dp2_pwr>;
+
+ port {
+ dp2_connector_in: endpoint {
+ remote-endpoint = <&mdss1_dp0_out>;
+ };
+ };
+ };
+
+ dp3-connector {
+ compatible = "dp-connector";
+ label = "DP3";
+ type = "full-size";
+
+ dp-pwr-supply = <&vreg_dp3_pwr>;
+
+ port {
+ dp3_connector_in: endpoint {
+ remote-endpoint = <&mdss1_dp1_out>;
+ };
+ };
+ };
+
+ vreg_dp0_pwr: regulator-dp0-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "VREG_DP0_PWR_3P3";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&expander1 7 GPIO_ACTIVE_HIGH>;
+ };
+
+ vreg_dp1_pwr: regulator-dp1-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "VREG_DP1_PWR_3P3";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&expander1 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ vreg_dp2_pwr: regulator-dp2-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "VREG_DP2_PWR_3P3";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&expander1 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ vreg_dp3_pwr: regulator-dp3-pwr {
+ compatible = "regulator-fixed";
+ regulator-name = "VREG_DP3_PWR_3P3";
+
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&expander1 10 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&i2c2 {
+ status = "okay";
+
+ expander0: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander1: gpio@21 {
+ compatible = "ti,tca6416";
+ reg = <0x21>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander2: gpio@22 {
+ compatible = "ti,tca6416";
+ reg = <0x22>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander3: gpio@23 {
+ compatible = "ti,tca6416";
+ reg = <0x23>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ expander4: gpio@38 {
+ compatible = "nxp,pca9534";
+ reg = <0x38>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+};
+
+&tlmm {
+
+ dp2_hot_plug_det: dp2-hot-plug-det-state {
+ pins = "gpio104";
+ function = "edp2_hot";
+ bias-disable;
+ };
+
+ dp3_hot_plug_det: dp3-hot-plug-det-state {
+ pins = "gpio103";
+ function = "edp3_hot";
+ bias-disable;
+ };
+
+ ethernet0_default: ethernet0-default-state {
+ ethernet0_mdc: ethernet0-mdc-pins {
+ pins = "gpio8";
+ function = "emac0_mdc";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ ethernet0_mdio: ethernet0-mdio-pins {
+ pins = "gpio9";
+ function = "emac0_mdio";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
+ ethernet1_default: ethernet1-default-state {
+ ethernet1_mdc: ethernet1-mdc-pins {
+ pins = "gpio20";
+ function = "emac1_mdc";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ ethernet1_mdio: ethernet1-mdio-pins {
+ pins = "gpio21";
+ function = "emac1_mdio";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
+};
+
+&i2c18 {
+ status = "okay";
+
+ expander5: gpio@3c {
+ compatible = "nxp,pca9534";
+ reg = <0x3c>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ eeprom@50 {
+ compatible = "giantec,gt24c256c", "atmel,24c256";
+ reg = <0x50>;
+ pagesize = <64>;
+
+ nvmem-layout {
+ compatible = "fixed-layout";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mac_addr0: mac-addr@0 {
+ reg = <0x0 0x6>;
+ };
+
+ mac_addr1: mac-addr@6 {
+ reg = <0x6 0x6>;
+ };
+ };
+ };
+};
+
+&i2c4 {
+ status = "okay";
+
+ fan_controller: fan@1a {
+ compatible = "ti,amc6821";
+ reg = <0x1a>;
+ #pwm-cells = <2>;
+
+ fan {
+ pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>;
+ };
+ };
+};
+
+&qup_i2c4_default {
+ drive-strength = <6>;
+ bias-pull-up;
+};
+
+&spi16 {
+ status = "okay";
+
+ tpm@0 {
+ compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
+ reg = <0>;
+ spi-max-frequency = <20000000>;
+ };
+};
+
+&mdss0 {
+ status = "okay";
+};
+
+&mdss0_dp0 {
+ pinctrl-0 = <&dp0_hot_plug_det>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&mdss0_dp0_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+
+ remote-endpoint = <&dp0_connector_in>;
+};
+
+&mdss0_dp0_phy {
+ vdda-phy-supply = <&vreg_l1c>;
+ vdda-pll-supply = <&vreg_l4a>;
+
+ status = "okay";
+};
+
+&mdss0_dp1 {
+ pinctrl-0 = <&dp1_hot_plug_det>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&mdss0_dp1_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+
+ remote-endpoint = <&dp1_connector_in>;
+};
+
+&mdss0_dp1_phy {
+ vdda-phy-supply = <&vreg_l1c>;
+ vdda-pll-supply = <&vreg_l4a>;
+
+ status = "okay";
+};
+
+&mdss1 {
+ status = "okay";
+};
+
+&mdss1_dp0 {
+ pinctrl-0 = <&dp2_hot_plug_det>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&mdss1_dp0_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+
+ remote-endpoint = <&dp2_connector_in>;
+};
+
+&mdss1_dp0_phy {
+ vdda-phy-supply = <&vreg_l1c>;
+ vdda-pll-supply = <&vreg_l4a>;
+
+ status = "okay";
+};
+
+&mdss1_dp1 {
+ pinctrl-0 = <&dp3_hot_plug_det>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&mdss1_dp1_out {
+ data-lanes = <0 1 2 3>;
+ link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
+
+ remote-endpoint = <&dp3_connector_in>;
+};
+
+&mdss1_dp1_phy {
+ vdda-phy-supply = <&vreg_l1c>;
+ vdda-pll-supply = <&vreg_l4a>;
+
+ status = "okay";
+};
+
+ðernet0 {
+ phy-handle = <&hsgmii_phy0>;
+ phy-mode = "2500base-x";
+
+ pinctrl-0 = <ðernet0_default>;
+ pinctrl-names = "default";
+
+ snps,mtl-rx-config = <&mtl_rx_setup>;
+ snps,mtl-tx-config = <&mtl_tx_setup>;
+
+ nvmem-cells = <&mac_addr0>;
+ nvmem-cell-names = "mac-address";
+
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hsgmii_phy0: ethernet-phy {
+ compatible = "ethernet-phy-id004d.d101";
+ reg = <0x1c>;
+ reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <11000>;
+ reset-deassert-us = <70000>;
+ };
+ };
+
+ mtl_rx_setup: rx-queues-config {
+ snps,rx-queues-to-use = <4>;
+ snps,rx-sched-sp;
+
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,route-up;
+ snps,priority = <0x1>;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x1>;
+ snps,route-ptp;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x2>;
+ snps,route-avcp;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x3>;
+ snps,priority = <0xc>;
+ };
+ };
+
+ mtl_tx_setup: tx-queues-config {
+ snps,tx-queues-to-use = <4>;
+
+ queue0 {
+ snps,dcb-algorithm;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3e800>;
+ snps,low_credit = <0xffc18000>;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3e800>;
+ snps,low_credit = <0xffc18000>;
+ };
+ };
+};
+
+ðernet1 {
+ phy-handle = <&hsgmii_phy1>;
+ phy-mode = "2500base-x";
+
+ pinctrl-0 = <ðernet1_default>;
+ pinctrl-names = "default";
+
+ snps,mtl-rx-config = <&mtl_rx_setup1>;
+ snps,mtl-tx-config = <&mtl_tx_setup1>;
+
+ nvmem-cells = <&mac_addr1>;
+ nvmem-cell-names = "mac-address";
+
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hsgmii_phy1: ethernet-phy {
+ compatible = "ethernet-phy-id004d.d101";
+ reg = <0x1c>;
+ reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <11000>;
+ reset-deassert-us = <70000>;
+ };
+ };
+
+ mtl_rx_setup1: rx-queues-config {
+ snps,rx-queues-to-use = <4>;
+ snps,rx-sched-sp;
+
+ queue0 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x0>;
+ snps,route-up;
+ snps,priority = <0x1>;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ snps,map-to-dma-channel = <0x1>;
+ snps,route-ptp;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x2>;
+ snps,route-avcp;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,map-to-dma-channel = <0x3>;
+ snps,priority = <0xc>;
+ };
+ };
+
+ mtl_tx_setup1: tx-queues-config {
+ snps,tx-queues-to-use = <4>;
+
+ queue0 {
+ snps,dcb-algorithm;
+ };
+
+ queue1 {
+ snps,dcb-algorithm;
+ };
+
+ queue2 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3e800>;
+ snps,low_credit = <0xffc18000>;
+ };
+
+ queue3 {
+ snps,avb-algorithm;
+ snps,send_slope = <0x1000>;
+ snps,idle_slope = <0x1000>;
+ snps,high_credit = <0x3e800>;
+ snps,low_credit = <0xffc18000>;
+ };
+ };
+};
+
+&serdes0 {
+ phy-supply = <&vreg_l5a>;
+
+ status = "okay";
+};
+
+&serdes1 {
+ phy-supply = <&vreg_l5a>;
+
+ status = "okay";
+};
--
2.43.0
next prev parent reply other threads:[~2026-10-19 10:28 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-19 10:27 [PATCH 0/3] Add support for LeMans " Gopikishan Thawre
2026-10-19 10:27 ` [PATCH 1/3] dt-bindings: arm: qcom: Add " Gopikishan Thawre
2026-10-20 7:51 ` Krzysztof Kozlowski
2026-10-19 10:27 ` [PATCH 2/3] arm64: dts: qcom: lemans: Add Draco EVK SoM platform Gopikishan Thawre
2026-10-19 10:27 ` Gopikishan Thawre [this message]
2026-10-19 12:05 ` [PATCH 3/3] arm64: dts: qcom: lemans: Add Draco EVK board Dmitry Baryshkov
2026-10-19 12:31 ` Konrad Dybcio
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